The level test circuit with CMOS NAND gate 4011 connected into inverter

Published:2012/9/16 22:53:00 Author:Ecco | Keyword: level test , CMOS NAND gate , inverter | From:SeekIC

In this circuit, it can also use NOT gate to replace 4011. High level displays H, low level displays L. R2 ~ R4 play a limiting role, so the digital tube and its anode are connected to the positive power supply Vcc directly. The normally on segments e , f are grounded by R4 to reduce the drive current.



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