MFG:N/A Package Cooled:N/A D/C:09+
MFG: N/A
Package Cooled: N/A
D/C: 09+
Description: These P-Channel enhancement mode field effect transistor are produced using Fairchild's propriet...
These P-Channel enhancement mode field effect transistor are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is tailored to minimize on-state resistance at low gate drive conditions. This device is designed especially for application in battery power applications such as notebook computers and cellular phones. This device has excellent on-state resistance even at gate drive voltages as low as 2.5 volts.
|
Symbol |
Parameter |
FDC6304P |
Units |
|
VDSS |
Drain-Source Voltage, Power Supply Voltage |
-25 |
V |
|
VGSS |
Gate-Source Voltage |
-8
|
V |
|
ID, IO |
Drain Current - Continuous
- Pulsed
|
-0.46
|
A |
|
-1 | |||
|
PD |
Maximum Power Dissipation (Note 1a)
(Note1b) |
0.9 |
W |
|
0.7 | |||
|
TJ, Tstg |
Operating and Storage Tempature Ranger |
-55 to +150 |
°C |
|
ESD |
Electrostatic Discharge Rating MIL-STD-883D
Human Body Model (100pf / 1500 Ohm) |
6 |
kV |
FDC6304P
PDF/DataSheet Download
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These Dual P-Channel logic level enhancement mode field effect transistors FDC6302P are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This de...
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