The Fujitsu MB81ES171625/173225 is a Fast Cycle Random Access Memory (FCRAM*) containing 16,777,216 bit memory cells accessible in a 2´512K´16 bit / 2´256K´32 bit format. The MB81ES171625/173225 features a fully synchronous operation referenced to a positive edge clock same as that of SDRAM operation, whereby all operations are synchronized at a clock input which enables high performance and simple user interface coexistence.
The MB81ES171625/173225 is utilized using a Fujitsu advanced FCRAM core technology and designed for low power consumption and low voltage operation than regular synchronous DRAM (SDRAM).
The MB81ES171625/173225 is dedicated for SiP (System in a Package), and ideally suited for various embedded/ consumer applications including digital AVs, and image processing where a large band width and low power consumption memory is needed.
| Parameter |
Conditions |
Rating |
Units | |
|
Min |
Max | |||
| Voltage of VCCQ Supply Relative to VSS |
VCCQ |
–0.5 |
+3.0 |
V |
| Voltage at Any Pin Relative to VSS |
VIN, VOUT |
–0.5 |
+3.0 |
V |
| Short Circuit Output Current |
IOUT |
–13 |
+13 |
mA |
| Storage Temperature |
TSTG |
–55 |
+125 |
°C |
• FCRAM core with Single Data Rate SDRAM interface
• 512 K word ´ 16 bit ´ 2 bank or 256 K word ´ 32 bit ´ 2 bank organization
• Single +1.8 V Supply ±0.15 V tolerance
• CMOS I/O interface
• Programmable burst type, burst length, and CAS latency
-Burst type : Sequential Mode, Interleave Mode
-Burst length : 1, 2, 4, 8, full column (64 : ´16 bit, 32 : ´32 bit)
-CAS latency
-MB81ES171625/173225-12
-CL = 1 (Min tCK = 23.4 ns, Max 42.7 MHz)
-CL = 2 (Min tCK = 11.7 ns, Max 85 MHz)
• 2 K refresh cycles every 16 ms
• Auto- and Self-refresh
• CKE power down mode
• Output Enable and Input Data Mask
• Burst Stop command at full column burst
• Burst read/write
• 85 MHz/66.7 MHz Clock frequency
Related PDF
MB80101BBN