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74ALVT16652DL, 74ALVT16821, 74ALVT16821ADL

Table of contents:
Info of 74ALVT16652DL
Info of 74ALVT16821
Info of 74ALVT16821ADL

74ALVT16652DL, 74ALVT16821, 74ALVT16821ADL Selling Leads, Datasheet

MFG:PHILIPS Package Cooled:TSOP56 D/C:2007+

74ALVT16652DL, 74ALVT16821, 74ALVT16821ADL Picture

74ALVT16652DL, 74ALVT16821, 74ALVT16821ADL Datasheet download

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Part Number: 74ALVT16652DL

MFG: PHILIPS

Package Cooled: TSOP56

D/C: 2007+

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74ALVT16821 General Description

The 74ALVT16821 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. It is designed for V_CCoperation at 2.5V or 3.3V with I/O compatibility to 5V.

The 74ALVT16821 has two 10-bit, edge triggered registers, with each register coupled to a 3-State output buffer. The two sections of each register are controlled independently by the clock (nCP) and Output Enable (nOE) control gates.

Each register is fully edge triggered. The state of each D input, one set-up time before the Low-to-High clock transition, is transferred to the corresponding flip-flop's Q output.

The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors.

The active Low Output Enable (nOE) controls all ten 3-State buffers independent of the register operation. When nOE is Low, the data in the register appears at the outputs. When nOE is High, the outputs are in high impedance "off" state, which means they will neither drive nor load the bus.

74ALVT16821 Maximum Ratings

SYMBOL	PARAMETER	CONDITIONS	RATING	UNIT
V_CC	DC supply voltage		0.5 to +4.6	V
I_IK	DC input diode current	V_I < 0	50	mA
V_I	DC input voltage³		1.2 to +7.0	V
I_OK	DC output diode current	V_O < 0	50	mA
V_OUT	DC output voltage³	Output in Off or High state	0.5 to +7.0	V
I_OUT	DC output current	Output in Low state	128	mA
I_OUT	DC output current	Output in High state	64	mA
T_stg	Storage temperature range		65 to +150	mA

NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.

74ALVT16821 Features

• 20-bit positive-edge triggered register
• 5V I/O Compatible
• Multiple V_CC and GND pins minimize switching noise
• Live insertion/extraction permitted
• Power-up reset
• Power-up 3-State
• Output capability: +64mA/-32mA
• Latch-up protection exceeds 500mA per Jedec Std 17
• ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
• Bus hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs

74ALVT16821 Connection Diagram

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