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74F14, 74F146, 74F148

Table of contents:
Info of 74F14
Info of 74F146
Info of 74F148

74F14, 74F146, 74F148 Selling Leads, Datasheet

MFG:NS Package Cooled:SOP D/C:99

74F14, 74F146, 74F148 Datasheet download

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Part Number: 74F14

MFG: NS

Package Cooled: SOP

D/C: 99

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74F14 General Description

The 'F14 contains six logic inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. In addition, they have a greater noise margin than conventional inverters.

Each circuit contains a Schmitt trigger followed by a Darlington level shifter and a phase splitter driving a TTL totempole output. The Schmitt trigger uses positive feed back to effectively speed-up slow input transition, and provide different input threshold voltages for positive and negative-going transitions. This hysteresis between the positive-going and negative-going input thresholds (typically 800 mV) is determined internally by resistor ratios and is essentially insensitive to temperature and supply voltage variations.

74F14 Maximum Ratings

Storage Temperature .........................................................................................-65 to +150
Ambient Temperature under Bias .......................................................................-55 to +125
Junction Temperature under Bias .......................................................................-55 to +175
V_CC Pin Potential to
   Ground Pin ........................................................................................................-0.5V to +7.0V
Input Voltage (Note 2) .........................................................................................-0.5V to +7.0V
Input Current (Note 2) ...................................................................................-30 mA to +5.0 mA
Voltage Applied to Output
   in HIGH State (with V_CC = 0V)
   Standard Output ..................................................................................................-0.5V to V_CC
   TRI-STATE® Output ...........................................................................................-0.5V to +5.5V
Current Applied to Output
   in LOW State (Max) ..............................................................................twice the rated I_OL (mA)
ESD Last Passing Voltage (Min) ...........................................................................................4000V

74F14 Features

* Guaranteed 4000V minimum ESD protection
* Standard Military Drawing
5962-88752

74F14 Connection Diagram

74F148 General Description

The F148 provides three bits of binary coded output representing the position of the highest order active input, along with an output indicating the presence of any active input. It is easily expanded via input and output enables to provide priority encoding over many bits.

74F148 Maximum Ratings

Storage Temperature                                   -65°C to +150°C
Ambient Temperature under Bias                -55°C to +125°C
Junction Temperature under Bias                -55°C to +150°C
V_CC Pin Potential to Ground Pin                      -0.5V to +7.0V
Input Voltage (Note 2)                                    -0.5V to +7.0V
Input Current (Note 2)                             -30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with V_CC = 0V)
Standard Output                                              -0.5V to V_CC
3-STATE Output                                              -0.5V to +5.5V
Current Applied to Output
in LOW State (Max)                        twice the rated I_OL (mA)
Free Air Ambient Temperature                       0°C to +70°C
Supply Voltage                                            +4.5V to +5.5V

74F148 Features

Encodes eight data lines in priority
Provides 3-bit binary priority code
Input enable capability
Signals when data is present on any input
Cascadable for priority encoding of n bits

74F148 Connection Diagram

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