74F382, 74F382D, 74F382PC Selling Leads, Datasheet
MFG:TI Package Cooled:DIP-20 D/C:06+
74F382, 74F382D, 74F382PC Datasheet download

Part Number: 74F382
MFG: TI
Package Cooled: DIP-20
D/C: 06+
MFG:TI Package Cooled:DIP-20 D/C:06+
74F382, 74F382D, 74F382PC Datasheet download

MFG: TI
Package Cooled: DIP-20
D/C: 06+
Want to post a buying lead? If you are not a member yet, please select the specific/related part number first and then fill the quantity and your contact details in the "Request for Quotation Form" on the left, and then click "Send RFQ".Your buying lead can then be posted, and the reliable suppliers will quote via our online message system or other channels soon.
TOP
PDF/DataSheet Download
Datasheet: 74F382
File Size: 124747 KB
Manufacturer: FAIRCHILD [Fairchild Semiconductor]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: 74F00
File Size: 49449 KB
Manufacturer: PHILIPS [Philips Semiconductors]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: 74F382PC
File Size: 79975 KB
Manufacturer: FAIRCHILD [Fairchild Semiconductor]
Download : Click here to Download
The 74F382 performs three arithmetic and three logic operations on two 4-bit words, A and B. Two additional Select (S0S2) input codes force the Function outputs Low or High. An overflow output is provided for convenience in Two's Complement arithmetic.
A carry output is provided for ripple expansion. For high-speed expansion using a carry look-ahead generator, refer to the 74F381 data sheet.
Signals applied to the Select inputs, S0S2, determine the mode of operation, as indicated in the Function Select Table. An extensive listing of input and output levels is shown in the Function Table. The circuit performs the arithmetic functions for either active-HIgh or active-Low operands, with output levels in the same convention. In the subtract operating modes, it is necessary to force a carry (High for active-HIgh operands, Low for active-Low operands) into the Cn input of the least significant package. Ripple expansion is illustrated in Figure 1. The overflow output OVR is the Exclusive-OR of Cn+3 and Cn+4; a High signal on OVR indicates overflow in Two's complement operation (See Table 2 for Two's complement arithmetic). Typical delays for Figure 1 are given in Table 1. When the 74F382 is cascaded to handle word lengths longer than 4 bits, only the most significant overflow (OVR) output is used.
|
SYMBOL |
PARAMETER |
RATING |
UNIT |
| VCC | Supply voltage |
0.5 to +7.0 |
V |
| VIN | Input voltage |
0.5 to +7.0 |
V |
| IIN | Input current |
30 to +5 |
mA |
| VOUT | Voltage applied to output in high output state |
0.5 to VCC |
V |
| IOUT | Current applied to output in low output state |
40 |
mA |
| Tamb | Operating free air temperature range |
0 to +70 |
°C |
| Tstg | Storage temperature range |
65 to +150 |
°C |

