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74F533, 74F533D, 74F533DR

Table of contents:
Info of 74F533
Info of 74F533D
Info of 74F533DR

74F533, 74F533D, 74F533DR Selling Leads, Datasheet

MFG:NS Package Cooled:SOP-20 D/C:96

74F533, 74F533D, 74F533DR Datasheet download

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Part Number: 74F533

MFG: NS

Package Cooled: SOP-20

D/C: 96

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74F533 General Description

The 74F533 is an octal transparent latch coupled to eight 3-State output buffers. The two sections of the device are controlled independently by Enable (E) and Output Enable (OE) control gates.

The data on the D inputs is transferred to the latch outputs when the Enable (E) input is High. The latch remains transparent to the data input while E is High and stores the data that is present one setup time before the High-to-Low enable transition.

The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. The active Low Output Enable (OE) controls all eight 3-State buffers independent of the latch operation. When OE is Low, the latched or transparent data appears at the outputs. When OE is High, the outputs are in high impedance "off" state, which means they will neither drive nor load the bus.

The 74F534 is an 8-bit edge-triggered register coupled to eight 3-State output buffers. The two sections of the device are controlled independently by the Clock (CP) and Output Enable (OE) control gates.

The register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition is transferred to the corresponding flip-flop's Q output.

The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. The active Low Output Enable (OE) controls all eight 3-State buffers independent of the latch operation. When OE is Low, the latched or transparent data appears at the outputs. When OE is High, the outputs are in high impedance "off" state, which means they will neither drive nor load the bus.

74F533 Maximum Ratings

SYMBOL	PARAMETER	RATING	UNIT
V_CC	Supply voltage	0.5 to +7.0	V
V_IN	Input voltage	0.5 to +7.0	V
I_IN	Input current	30 to +5	mA
V_OUT	Voltage applied to output in high output state	0.5 to VCC	V
I_OUT	Current applied to output in low output state	48	mA
T_amb	Operating free air temperature range	0 to +70	°C
Tstg	Storage temperature range	65 to +125	°C

74F533 Features

• 8-bit positive edge-triggered register 74F534
• 3-State inverting output buffers
• Common 3-State Output register
• Independent register and 3-State buffer operation

74F533 Connection Diagram

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