87C51, 87C51/BQA, 87C5101 Selling Leads, Datasheet
MFG:AMD/TNIEL Package Cooled:N/A D/C:DIP
87C51, 87C51/BQA, 87C5101 Datasheet download
Part Number: 87C51
MFG: AMD/TNIEL
Package Cooled: N/A
D/C: DIP
87C51, 87C51/BQA, 87C5101
- Table of contents:
Info of 87C51
Info of 87C51/BQA
Info of 87C5101
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About 87C51
PDF/DataSheet Download
Datasheet: 87C51
File Size: 287645 KB
Manufacturer: INTEL [Intel Corporation]
Download : Click here to Download
About 87C055
PDF/DataSheet Download
Datasheet: 87C055
File Size: 249495 KB
Manufacturer: PHILIPS [Philips Semiconductors]
Download : Click here to Download
About 87C055
PDF/DataSheet Download
Datasheet: 87C055
File Size: 249495 KB
Manufacturer: PHILIPS [Philips Semiconductors]
Download : Click here to Download
87C51 General Description
The Philips 80C31/80C51/87C51 is a high-performance microcontroller fabricated with Philips high-density CMOS
technology. The CMOS 8XC51 is functionally compatible with the NMOS 8031/8051 microcontrollers. The Philips CMOS technology combines the high speed and density characteristics of HMOS with the low power attributes of CMOS. Philips epitaxial substrate minimizes latch-up sensitivity.
The 8XC51 contains a 4k * 8 ROM (80C51) EPROM (87C51), a 128* 8 RAM, 32 I/O lines, two 16-bit counter/timers, a five-source,two-priority level nested interrupt structure, a serial I/O port for either multi-processor communications, I/O expansion or full duplex UART,and on-chip oscillator and clock circuits.
In addition, the device has two software selectable modes of power reduction-idle mode and power-down mode. The idle mode freezes the CPU while allowing the RAM, timers, serial port, and interrupt system to continue functioning. The power-down mode saves the RAM contents but freezes the oscillator, causing all other chip functions to be inoperative.
technology. The CMOS 8XC51 is functionally compatible with the NMOS 8031/8051 microcontrollers. The Philips CMOS technology combines the high speed and density characteristics of HMOS with the low power attributes of CMOS. Philips epitaxial substrate minimizes latch-up sensitivity.
The 8XC51 contains a 4k * 8 ROM (80C51) EPROM (87C51), a 128* 8 RAM, 32 I/O lines, two 16-bit counter/timers, a five-source,two-priority level nested interrupt structure, a serial I/O port for either multi-processor communications, I/O expansion or full duplex UART,and on-chip oscillator and clock circuits.
In addition, the device has two software selectable modes of power reduction-idle mode and power-down mode. The idle mode freezes the CPU while allowing the RAM, timers, serial port, and interrupt system to continue functioning. The power-down mode saves the RAM contents but freezes the oscillator, causing all other chip functions to be inoperative.
87C51 Maximum Ratings
Ambient TemperatureUnderBias .............-40to 85
Storage Temperature ...........................-65to 150
Voltage onEAVPP Pinto VSS...................... 0V to 130V
Voltage on Any Other Pinto VSS ..............-0.5V to 65V
Maximum IOL perIOPin .......................................15mA
Power Dissipation.................................................15W
(Based on package heat transfer limitations not de-vice power consumption)
NOTICE This data sheet contains preliminary infor-mation on new products in production It is valid for the devices indicated in the revision history The specifications are subject to change without notice
WARNING Stressing the device beyond the ''Absolute Maximum Ratings'' may cause permanent damage These are stress ratings only Operation beyond the''Operating Conditions'' is not recommended and ex-tended exposure beyond the ''Operating Conditions''may affect device reliability
87C51 Features
High Performance CHMOS EPROM
24 MHz Operation
Improved Quick-Pulse Programming Algorithm
3-Level Program Memory Lock
Boolean Processor
128-Byte Data RAM
32 Programmable IO Lines
Two 16-Bit TimerCounters
Extended Temperature Range( 40to 85)
5 Interrupt Sources
Programmable Serial Port
TTL- and CMOS-Compatible Logic Levels
64K External Program Memory Space
64K External Data Memory Space
ONCE Mode Facilitates System Testing
Power Control Modes
-Idle
-Power Down
24 MHz Operation
Improved Quick-Pulse Programming Algorithm
3-Level Program Memory Lock
Boolean Processor
128-Byte Data RAM
32 Programmable IO Lines
Two 16-Bit TimerCounters
Extended Temperature Range( 40to 85)
5 Interrupt Sources
Programmable Serial Port
TTL- and CMOS-Compatible Logic Levels
64K External Program Memory Space
64K External Data Memory Space
ONCE Mode Facilitates System Testing
Power Control Modes
-Idle
-Power Down
87C51 Connection Diagram
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