AM42-0039, AM4201, AM422-1-DIP8 Selling Leads, Datasheet
MFG:M/A-COM Package Cooled:Power Transistor D/C:05+
AM42-0039, AM4201, AM422-1-DIP8 Datasheet download

Part Number: AM42-0039
MFG: M/A-COM
Package Cooled: Power Transistor
D/C: 05+
MFG:M/A-COM Package Cooled:Power Transistor D/C:05+
AM42-0039, AM4201, AM422-1-DIP8 Datasheet download

MFG: M/A-COM
Package Cooled: Power Transistor
D/C: 05+
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PDF/DataSheet Download
Datasheet: AM42-0039
File Size: 41760 KB
Manufacturer: MACOM [Tyco Electronics]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: AM40-0023
File Size: 212598 KB
Manufacturer: MACOM [Tyco Electronics]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: AM40-0023
File Size: 212598 KB
Manufacturer: MACOM [Tyco Electronics]
Download : Click here to Download
M/A-COM's AM42-0039 is a three-stage MMIC power amplifier in a ceramic bolt down style hermetic package. The AM42-0039 employs a fully matched monolithic chip with internally decoupled Gate and Drain bias networks. The
AM42-0039 is designed to be operated from a constant current Drain supply. By varying the Gate bias voltage, the saturated output power performance of this device can be tailored for various applications.
The AM42-0039 is designed for use as an output stage or driver amplifier for VSAT transmitter systems. This amplifier is monolithic and requires a minimum of external components.
M/A-COM's AM42-0039 is fabricated using a mature 0.5 micron GaAs MESFET process. The chip is fully passivated for increased performance and reliability. These amplifiers are 100% RF tested to ensure compliance to performance
specifications.
Parameter Absolute Maximum
Input Power +23 dBm
VDD +12 Volts
VGG -3 Volts
VDD - VGG 12 Volts
IDD 1700 mA
Channel Temperature -40°C to +85°C
Storage Temperature -65°C to +150°C
1. Exceeding any one or a combination of these limits may cause permanent damage.
2. Case Temperature (TC) = +25°C.
3. Nominal bias is obtained by first connecting -2 volts to pin 5 (VGG), followed by connecting +9 volts to pin 10 (VDD). Note sequence. Adjust VGG for a drain current of 1050 mA typical.
4. RF ground and thermal interface is the flange (case bottom). Adequate heat sinking is required.
5. No dc supply voltage will appear at the RF ports.
6. The dc resistance at the input and output ports is a short circuit. No voltage is allowed on these ports.
7. For optimum IP3 performance, the VDD bypass capacitors should be placed within 0.5 inches of the VDD leads.
