AT58U29A, AT5911W-SI, AT59C11 Selling Leads, Datasheet
MFG:ATMEL Package Cooled:TFBGA324L D/C:2007
AT58U29A, AT5911W-SI, AT59C11 Datasheet download
Part Number: AT58U29A
MFG: ATMEL
Package Cooled: TFBGA324L
D/C: 2007
AT58U29A, AT5911W-SI, AT59C11
- Table of contents:
Info of AT58U29A
Info of AT5911W-SI
Info of AT59C11
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About AT50-0107
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Datasheet: AT50-0107
File Size: 51553 KB
Manufacturer:
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About AT50-0107
PDF/DataSheet Download
Datasheet: AT50-0107
File Size: 51553 KB
Manufacturer:
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About AT59C11
PDF/DataSheet Download
Datasheet: AT59C11
File Size: 134474 KB
Manufacturer: ATMEL [ATMEL Corporation]
Download : Click here to Download
AT59C11 General Description
The AT59C11/22/13 provides 1024/2048/4096 bits of serial EEPROM (Electrically Erasable Programmable Read Only Memory) organized as 64/128/256 words of 16 bits each, when the ORG Pin is connected to VCC and 128/256/512 words of 8 bits each when it is tied to ground. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential.
The AT59C11/22/13 is available in space saving 8-pin PDIP and 8-pin EIAJ SOIC packages.
The AT59C11/22/13 is enabled through the Chip Select pin (CS), and accessed via a 4-wire serial interface consisting of Data Input (DI), Data Output (DO), and Clock (CLK). Upon receiving a READ instruction at DI, the address is decoded and the data is clocked out serially on the data output pin DO, the WRITE cycle is completely selftimed and no separate ERASE cycle is required before WRITE. The WRITE cycle is only enabled when the part is in the ERASE/WRITE ENABLE state. Ready/Busy status can be monitored upon completion of a programming operation by polling the Ready/Busy pin.
The AT59C11/22/13 is available in 5.0V ± 10%, 2.7V to 5.5V and 2.5V to 5.5V versions.
The AT59C11/22/13 is available in space saving 8-pin PDIP and 8-pin EIAJ SOIC packages.
The AT59C11/22/13 is enabled through the Chip Select pin (CS), and accessed via a 4-wire serial interface consisting of Data Input (DI), Data Output (DO), and Clock (CLK). Upon receiving a READ instruction at DI, the address is decoded and the data is clocked out serially on the data output pin DO, the WRITE cycle is completely selftimed and no separate ERASE cycle is required before WRITE. The WRITE cycle is only enabled when the part is in the ERASE/WRITE ENABLE state. Ready/Busy status can be monitored upon completion of a programming operation by polling the Ready/Busy pin.
The AT59C11/22/13 is available in 5.0V ± 10%, 2.7V to 5.5V and 2.5V to 5.5V versions.
AT59C11 Maximum Ratings
|
Operating Temperature.................... -55°C to +125°C |
AT59C11 Features
• Low Voltage and Standard Voltage Operation
5.0 (VCC = 4.5V to 5.5V)
2.7 (VCC = 2.7V to 5.5V)
2.5 (VCC = 2.5V to 5.5V)
• User Selectable Internal Organization
1K: 128 x 8 or 64 x 16
2K: 256 x 8 or 128 x 16
4K: 512 x 8 or 256 x 16
• 4-Wire Serial Interface
• Self-Timed Write Cycle (10 ms max)
• High Reliability
Endurance: 1 Million Write Cycles
Data Retention: 100 Years
ESD Protection: >4000V
• 8-Pin PDIP and 8-Pin EIAJ SOIC Packages
5.0 (VCC = 4.5V to 5.5V)
2.7 (VCC = 2.7V to 5.5V)
2.5 (VCC = 2.5V to 5.5V)
• User Selectable Internal Organization
1K: 128 x 8 or 64 x 16
2K: 256 x 8 or 128 x 16
4K: 512 x 8 or 256 x 16
• 4-Wire Serial Interface
• Self-Timed Write Cycle (10 ms max)
• High Reliability
Endurance: 1 Million Write Cycles
Data Retention: 100 Years
ESD Protection: >4000V
• 8-Pin PDIP and 8-Pin EIAJ SOIC Packages
AT59C11 Connection Diagram
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