ATA5745, ATA5745-PXPW, ATA5745-PXPW 19 Selling Leads, Datasheet
MFG:ATMEL Package Cooled:QFN D/C:06+
ATA5745, ATA5745-PXPW, ATA5745-PXPW 19 Datasheet download
Part Number: ATA5745
MFG: ATMEL
Package Cooled: QFN
D/C: 06+
MFG:ATMEL Package Cooled:QFN D/C:06+
ATA5745, ATA5745-PXPW, ATA5745-PXPW 19 Datasheet download
MFG: ATMEL
Package Cooled: QFN
D/C: 06+
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Datasheet: ATA5745
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Datasheet: ATA00501
File Size: 227945 KB
Manufacturer: Anadigics
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PDF/DataSheet Download
Datasheet: ATA00501
File Size: 227945 KB
Manufacturer: Anadigics
Download : Click here to Download
The ATA5745/ATA5746 is a UHF ASK/FSK transparent receiver IC with low power consumption supplied in a small QFN24 package (body 5 mm * 5 mm, pitch 0.65 mm). ATA5745 is used in the 433 MHz to 435 MHz band of operation, and ATA5746 in 313 MHz to 317 MHz. The IC combines the functionality of remote keyless entry (RKE - typically low bit rate ASK) and tire pressure monitoring (TPM - typically high bit rate FSK) into one receiver under the control of an external microcontroller such as an ATmega48 (AVR®).
For improved image rejection and selectivity, the IF frequency is fixed to 440 kHz. The IF block uses an 8th-order band pass yielding a receive bandwidth of 420 kHz. This enables the use of the receiver in both SAW- and PLL-based transmitter systems utilizing various types of data-bit encoding such as pulse width modulation, Manchester modulation, variable pulse modulation, pulse position modulation, and NRZ. Prevailing encryption protocols such as Keeloq® are easily supported due to the receiver's ability to hold the current data slicer threshold for up to 52 ms when incoming RF telegrams contain a blanking interval. This feature eliminates erroneous noise from appearing on the demodulated data output pin, and simplifies software decoding algorithms. The decoding of the data stream must be carried out by a connected microcontroller device. Because of the highly integrated design, the only required RF components are for the purpose of receiver antenna matching.
ATA5745 and ATA5746 support Manchester bit rates of 1 Kbit/s to 10 Kbits/s in ASK and 1 Kbit/s to 20 Kbits/s in FSK mode. The four discrete bit rate passbands are selectable and cover 1.0 Kbit/s to 2.5 Kbits/s, 2.0 Kbits/s to 5.0 Kbits/s, 4.0 Kbits/s to 10.0 Kbits/s, and 8.0 Kbits/s to 10.0 Kbits/s or 20.0 Kbits/s (for ASK or FSK, respectively). The receiver contains an RSSI output to provide an indication of received signal strength and a SENSE input to allow the customer to select a threshold below which the DATA signal is gated off. ASK/FSK and bit rate ranges are selected by the connected microcontroller device via pins ASK_NFSK, BR0, and BR1.
Parameters |
Symbol |
Min. |
Max. |
Unit |
Junction temperature |
Tj |
+150 |
°C | |
Storage temperature |
Tstg |
-55 |
+125 |
°C |
Ambient temperature |
Tamb |
-40 |
+105 |
°C |
Supply voltage VS5V |
VS |
+6 |
V | |
ESD (Human Body Model ESD S 5.1) every pin |
HBM |
-4 |
+4 |
KV |
ESD (Machine Model JEDEC A115A) every pin |
MM |
-200 |
+200 |
V |
ESD (Field Induced Charge Device Model ESD STM 5.3.1-1999) every pin |
FCDM |
-500 |
+500 |
V |
Maximum input level, input matched to 50 |
Pin_max |
0 |
dBm |
• Transparent RF Receiver ICs for 315 MHz (ATA5746) and 433.92 MHz (ATA5745) With High Receiving Sensitivity
• Fully Integrated PLL With Low Phase Noise VCO, PLL, and Loop Filter
• High FSK/ASK Sensitivity:105 dBm (ATA5746, FSK, 9.6 Kbits/s, Manchester, BER 10-3)
114 dBm (ATA5746, ASK, 2.4 Kbits/s, Manchester, BER 10-3)
104 dBm (ATA5745, FSK, 9.6 Kbits/s, Manchester, BER 10-3)
113 dBm (ATA5745, ASK, 2.4 Kbits/s, Manchester, BER 10-3)
• Supply Current: 6.5 mA in Active Mode (3V, 25°C, ASK Mode)
• Data Rate: 1 Kbit/s to 10 Kbits/s Manchester ASK, 1 Kbit/s to 20 Kbits/s Manchester FSK With Four Programmable Bit Rate Ranges
• Switching Between Modulation Types ASK/FSK and Different Data Rates Possible in 1 ms Typically, Without Hardware Modification on Board to Allow Different Modulation Schemes for RKE, TPMS
• Low Standby Current: 50 A at 3V, 25°C
• ASK/FSK Receiver Uses a Low-IF Architecture With High Selectivity, Blocking, and Low Intermodulation (Typical 3-dB Blocking 68.0 dBC at ±3 MHz/74.0 dBC at ±20.0 MHz, System I1dBCP = 31 dBm/System IIP3 = 24 dBm)
• Telegram Pause Up to 52 ms Supported in ASK Mode
• Wide Bandwidth AGC to Handle Large Out-of-band Blockers above the System I1dBCP
• 440-kHz IF Frequency With 30-dB Image Rejection and 420-kHz IF Bandwidth to Support PLL Transmitters With Standard Crystals or SAW-based Transmitters
• RSSI (Received Signal Strength Indicator) With Output Signal Dynamic Range of 65 dB
• Low In-band Sensitivity Change of Typically ±2.0 dB Within ±160-kHz Center Frequency Change in the Complete Temperature and Supply Voltage Range
• Sophisticated Threshold Control and Quasi-peak Detector Circuit in the Data Slicer
• Fast and Stable XTO Start-up Circuit (> 1.4 k Worst-case Start Impedance)
• Clock Generation for Microcontroller
• ESD Protection at all Pins (±4 kV HBM, ±200V MM, ±500V FCDM)
• Dual Supply Voltage Range: 2.7V to 3.3V or 4.5V to 5.5V
• Temperature Range: 40°C to +105°C
• Small 5 mm * 5 mm QFN24 Package