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ATA6660-TAPY-19, ATA6661-TAQJ 19, ATA6662

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Info of ATA6660-TAPY-19
Info of ATA6661-TAQJ 19
Info of ATA6662

ATA6660-TAPY-19, ATA6661-TAQJ 19, ATA6662 Selling Leads, Datasheet

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ATA6660-TAPY-19, ATA6661-TAQJ 19, ATA6662 Picture

ATA6660-TAPY-19, ATA6661-TAQJ 19, ATA6662 Datasheet download

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Part Number: ATA6660-TAPY-19

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Package Cooled: Original and new, Special price!

D/C: 09+

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ATA6662 General Description

The ATA6662 is a fully integrated LIN transceiver complying with the LIN specification 2.0 and SAEJ2602-2. It interfaces the LIN protocol handler and the physical layer. The device is designed to handle the low-speed data communication in vehicles, for example, in convenience electronics. Improved slope control at the LIN bus ensures secure data communication up to 20 Kbaud with an RC oscillator for protocol handling. Sleep mode guarantees minimal current consumption. The ATA6662 has advanced EMI and ESD performance.

ATA6662 Maximum Ratings

Parameters	Symbol	Min.	Typ.	Max.	Unit
V_S- Continuous supply voltage		0.3		+40	V
Wake DC and transient voltage (with 33-kΩ serial resistor) - Transient voltage due to ISO7637 (coupling 1 nF)		1 150		+40 +100	V V
Logic pins (RXD, TXD, EN)		0.3		+5.5	V
LIN - DC voltage - Transient voltage due to ISO7637 (coupling 1 nF)		27 150		+40 +100	V
INH - DC voltage		0.3		+40	V
According to IBEE LIN EMC Test specification 1.0 following IEC 61000-4-2 - Pin VS, LIN to GND - Pin WAKE (33 kΩ serial resistor)		±6 ±5			KV KV
ESD HBM following STM5.1 with 1.5 kΩ/100 pF - Pin VS, LIN, WAKE to GND - Pin INH to GND		±8 ±6			KV KV
HBM ESD ANSI/ESD-STM5.1 JESD22-A114 AEC-Q100 (002)		±3			KV
CDM ESD STM 5.3.1		±750			V
Junction temperature	T_j	40		+150
Storage temperature	T_stg	55		+150
Thermal shutdown	T_off	150	165	180
Thermal shutdown hysteresis	T_hys	5	10	20

Note: 1. Equivalent to discharge a 100-pF capacitor through a 1.5-kΩ resistor.

ATA6662 Features

• Operating Range from 5V to 27V
• Baud Rate up to 20 Kbaud
• Improved Slew Rate Control According to LIN Specification 2.0 and SAEJ2602-2
• Fully Compatible with 3.3V and 5V Devices
• Dominant Time-out Function at Transmit Data (TXD)
• Normal and Sleep Mode
• Wake-up Capability via LIN Bus (90 µs Dominant)
• External Wake-up via WAKE Pin (35 µs Low Level)
• Control of External Voltage Regulator via INH Pin
• Very Low Standby Current During Sleep Mode (10 µA)
• Wake-up Source Recognition
• Bus Pin Short-circuit Protected versus GND and Battery
• LIN Input Current Typically 5 µA if V_BAT Is Disconnected
• Overtemperature Protection
• High EMC Level
• Interference and Damage Protection According to ISO/CD 7637
• ESD HBM 6 kV at LIN Bus Pin and Supply VS Pin

ATA6662 Connection Diagram

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