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ATMEGA103L, ATMEGA103L-4A, ATMEGA103L4AC

ATMEGA103L, ATMEGA103L-4A, ATMEGA103L4AC Selling Leads, Datasheet

MFG:ATMEL  Package Cooled:N/A  D/C:08+

ATMEGA103L, ATMEGA103L-4A, ATMEGA103L4AC Picture

ATMEGA103L, ATMEGA103L-4A, ATMEGA103L4AC Datasheet download

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Part Number: ATMEGA103L

 

MFG: ATMEL

Package Cooled: N/A

D/C: 08+

 

 

 
 
 
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About ATMEGA103L

PDF/DataSheet Download

Datasheet: ATMEGA103L

File Size: 287528 KB

Manufacturer: ATMEL [ATMEL Corporation]

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ATMEGA103L-4A Suppliers

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About ATMEGA103L-4AC

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Datasheet: ATMEGA103L-4AC

File Size: 287528 KB

Manufacturer: ATMEL [ATMEL Corporation]

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About ATM UTOPIA

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Datasheet: ATM UTOPIA

File Size: 118420 KB

Manufacturer: Lucent Technologies

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ATMEGA103L General Description

The ATmega603/103 is a low-power CMOS 8-bit microcon-troller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega603/103 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.

The AVR core is based on an enhanced RISC architecture that combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly con-nected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruc-tion executed in one clock cycle. The resulting architectureis more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.

The ATmega603/103 provides the following features: 64K/128K bytes of In-system Programmable Flash, 2K/4K bytes EEPROM, 4K bytes SRAM, 32 general purpose I/O lines, 8 Input lines, 8 Output lines, 32 general purpose working registers, 4 flexible timer/counters with compare modes and PWM, UART, programmable Watchdog Timer with internal oscillator, an SPI serial port and three software selectable power saving modes. The Idle Mode stops the CPU while allowing the SRAM, timer/counters, SPI port and interrupt system to continue functioning. The Power

ATMEGA103L Features

• Utilizes the AVR® Enhanced RISC Architecture
• 121 Powerful Instructions - Most Single Clock Cycle Execution
• 128K bytes of In-System Reprogrammable Flash ATmega103/L 64K bytes of In-System Reprogrammable Flash ATmega603/L
SPI Interface for In-System Programming
Endurance: 1,000 Write/Erase Cycles
• 4K bytes EEPROM ATmega103/L 2K bytes of EEPROM ATmega603/L
Endurance: 100,000 Write/Erase Cycles
• 4K bytes Internal SRAM
• 32 x 8 General Purpose Working Registers + Peripheral Control Registers
• 32 Programmable I/O Lines, 8 Output Lines, 8 Input Lines
• Programmable Serial UART + SPI Serial Interface
• VCC  Supply
2.7 - 3.6V ATmega603L/ATmega103L
4.0 - 5.5V ATmega603/ATmega103
• Fully Static Operation
0 - 6 MHz ATmega603/ATmega103
0 - 4 MHz ATmega603L/ATmega103L
• Up to 6 MIPS Throughput at 6 MHz
• RTC with Separate Oscillator
• Two 8-Bit Timer/Counters with Separate Prescaler and PWM
• One 16-Bit Timer/Counter with Separate Prescaler, Compare, Capture Modes and Dual 8-, 9- or 10-Bit PWM
• Programmable Watchdog Timer with On-Chip Oscillator
• On-Chip Analog Comparator
• 8-Channel, 10-Bit ADC
• Low Power Idle, Power Save and Power Down Modes
• Software Selectable Clock Frequency
• Programming Lock for Software Security

ATMEGA103L Connection Diagram

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