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DM74ALS645AWMX, DM74ALS645WM, DM74ALS646

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Info of DM74ALS645AWMX
Info of DM74ALS645WM
Info of DM74ALS646

DM74ALS645AWMX, DM74ALS645WM, DM74ALS646 Selling Leads, Datasheet

MFG:Fairchild Semiconductor Category:Integrated Circuits (ICs) Package Cooled:SOP20/7.2 D/C:07+

DM74ALS645AWMX, DM74ALS645WM, DM74ALS646 Datasheet download

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Part Number: DM74ALS645AWMX

Category: Integrated Circuits (ICs)

MFG: Fairchild Semiconductor

Package Cooled: SOP20/7.2

D/C: 07+

Description: IC TRANSCVR TRI-ST OCTAL 20SOIC

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DM74ALS645AWMX Parameters

Technical/Catalog Information	DM74ALS645AWMX
Vendor	Fairchild Semiconductor
Category	Integrated Circuits (ICs)
Logic Type	Transceiver, Non-Inverting
Package / Case	20-SOIC
Packaging	Tape & Reel (TR)
Mounting Type	Surface Mount
Number of Bits per Element	8
Number of Elements	1 - Single
Operating Temperature	0°C ~ 70°C
Voltage - Supply	4.5 V ~ 5.5 V
Current - Output High, Low	15mA, 24mA
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	DM74ALS645AWMX DM74ALS645AWMX

DM74ALS646 General Description

This device incorporates an octal bus transceiver and an octal D-type register configured to enable multiplexed transmission of data from bus to bus or internal register to bus.

This bus transceiver features totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or rela-tively low-impedance loads. The high-impedance state and increased high-logic level drive provides this device with the capability of being connected directly to and driving the bus lines in a bus-organized system without the need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidi-rectional bus drivers, and working registers.

The registers in the DM74ALS646 are edge-triggered D-type flip-flops. On the positive transition of the clock (CAB or CBA), the input bus data is stored into the appropriate register. The CAB input controls the transfer of data into the A register and the CBA input controls the B register.

The SAB and SBA control pins are provided to select whether real-time data or stored data is transferred. A LOW input level selects real-time data, and a HIGH level selects stored data. The select controls have a "make before break" configuration to eliminate a glitch which would nor-mally occur in a typical multiplexer during the transition between store and real-time data.

The enable G and direction control pins provide four modes of operation: real-time data transfer from bus A to B, real-time data transfer from bus B to A, real-time bus A and/or B data transfer to internal storage, or internally stored data transfer to bus A or B.

When the enable G pin is LOW, the direction pin selects which bus receives data. When the enable G pin is HIGH, both buses become disabled yet their input function is stil enabled.

DM74ALS646 Maximum Ratings

Supply Voltage                                                                    7V
Input Voltage
   Control Inputs                                                                   7V
   I/O Ports                                                                       5.5V
Operating Free-Air Temperature Range            0°C to +70°C
Storage Temperature Range                       −65°C to +150°C
Typical JA
   N Package                                                             44.5°C/W
   M Package                                                             80.5°C/W

DM74ALS646 Features

Switching specifications at 50 pF
Switching specifications guaranteed over full tempera-ture and VCC range
Advanced oxide-isolated, ion-implanted Schottky TTL process
3-STATE buffer outputs drive bus lines directly
Multiplexed real-time and stored data
Independent registers for A and B buses

DM74ALS646 Connection Diagram

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