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These P-Channel 1.8V specified MOSFETs are produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize on-state resistance and yet maintain low gate charge for superior switching performance.
FDC6318P Maximum Ratings
Symbol
Parameter
Ratings
Units
VDSS
Drain-Source Voltage
-20
V
VGSS
Gate-Source Voltage
±8
V
ID
Drain Current - Continuous (Note 1a)
- Pulsed
2.5
A
7
PD
Power Dissipation for Single Operation (Note 1a)
(Note 1b) (Note 1c)
0.96
W
0.9
0.7
TJ, Tstg
Operating and Storage Junction Temperature Range
-55 to +150
°C
FDC6318P Features
• 2.5 A, 12 V. R DS(ON)= 90 mΩ @ VGS = 4.5 V R DS(ON)= 125 mΩ @ VGS = 2.5 V R DS(ON)= 200 mΩ @ VGS = 1.8 V • High performance trench technology for extremely low R DS(ON) • SuperSOTTM-6 package: small footprint (72% smaller than standard SO-8); low profile (1mm thick)
FDC6318P Typical Application
• Power management • Load switch
FDC6320C Parameters
Technical/Catalog Information
FDC6320C
Vendor
Fairchild Semiconductor
Category
Discrete Semiconductor Products
Mounting Type
Surface Mount
FET Polarity
N and P-Channel
Drain to Source Voltage (Vdss)
25V
Current - Continuous Drain (Id) @ 25° C
220mA, 120mA
Rds On (Max) @ Id, Vgs
4 Ohm @ 400mA, 4.5V
Input Capacitance (Ciss) @ Vds
9.5pF @ 10V
Power - Max
700mW
Packaging
Tape & Reel (TR)
Gate Charge (Qg) @ Vgs
0.4nC @ 4.5V
Package / Case
SuperSOT-6
FET Feature
Logic Level Gate
Drawing Number
*
Lead Free Status
Lead Free
RoHS Status
RoHS Compliant
Other Names
FDC6320C FDC6320C
FDC6320C General Description
These dual N & P Channel logic level enhancement mode field effec transistors are produced using Fairchild's proprietary,high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance.The device is an improved design especially for low voltage applications as a replacement for bipolar digital transistors in load switching applications. Since bias resistors are not required, this dual digital FET can replace several digital transistors with difference bias resistors.
FDC6320C Maximum Ratings
Symbol
Parameter
N-Channel
P-Channel
Units
VDSS, VCC
Drain-Source Voltage, Power Supply Voltage
25
-25
V
VGSS, VIN
Gate-Source Voltage,
8
-8
V
ID, IO
Drain Current - Continuous
- Pulsed
0.22
-0.12
A
0.5
-0.5
PD
Maximum Power Dissipation (Note 1a)
(Note1b)
0.9
W
0.7
TJ, Tstg
Operating and Storage Tempature Ranger
-55 to +150
°C
ESD
Electrostatic Discharge Rating MIL-STD-883D
Human Body Model (100pf / 1500 Ohm)
6
kV
FDC6320C Features
N-Ch 25 V, 0.22 A, RDS(ON)= 5 W @ VGS= 2.7 V. P-Ch 25 V, -0.12 A, RDS(ON)= 13 W @ VGS= -2.7 V. Very low level gate drive requirements allowing direct operation in 3 V circuits. VGS(th)< 1.5 V. Gate-Source Zener for ESD ruggedness.>6kV Human Body Model Replace NPN & PNP digital transistors.
These dual N & P Channel logic level enhancement mode field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for digital transistors in load switching applications. Since bias resistors are not required this dual digital FET can replace several digital transistors with different bias resistors.
FDC6321C Maximum Ratings
Symbol
Parameter
N-Channel
P-Channel
Units
VDSS, VCC
Drain-Source Voltage, Power Supply Voltage
25
-25
V
VGSS, VIN
Gate-Source Voltage,
8
-8
V
ID, IO
Drain Current - Continuous
- Pulsed
0.68
-0.46
A
2
1.5
PD
Maximum Power Dissipation (Note 1a)
(Note1b)
0.9
W
0.7
TJ, Tstg
Operating and Storage Tempature Ranger
-55 to +150
°C
ESD
Electrostatic Discharge Rating MIL-STD-883D
Human Body Model (100pf / 1500 Ohm)
6
kV
FDC6321C Features
N-Ch 25 V, 0.68 A, R DS(ON)= 0.45 W @ VGS= 4.5 V P-Ch -25 V, -0.46 A, R DS(ON)= 1.1 W @ VGS= -4.5 V. Very low level gate drive requirements allowing direct operation in 3 V circuits. VGS(th)< 1.0V. Gate-Source Zener for ESD ruggedness.>6kV Human Body Model Replace multiple dual NPN & PNP digital transistors.
