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FDC6506P, FDC653N, FDC654

Table of contents:
Info of FDC6506P
Info of FDC653N
Info of FDC654

FDC6506P, FDC653N, FDC654 Selling Leads, Datasheet

MFG:Fairchild Semiconductor Category:Discrete Semiconductor Products Package Cooled:05+ D/C:18000

FDC6506P, FDC653N, FDC654 Datasheet download

Five Points

Part Number: FDC6506P

Category: Discrete Semiconductor Products

MFG: Fairchild Semiconductor

Package Cooled: 05+

D/C: 18000

Description: MOSFET N-CHAN 30V 5A SSOT6

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FDC6506P Parameters

Technical/Catalog Information	FDC6506P
Vendor	Fairchild Semiconductor (VA)
Category	Discrete Semiconductor Products
Mounting Type	Surface Mount
FET Polarity	2 P-Channel (Dual)
Drain to Source Voltage (Vdss)	30V
Current - Continuous Drain (Id) @ 25° C	1.8A
Rds On (Max) @ Id, Vgs	170 mOhm @ 1.8A, 10V
Input Capacitance (Ciss) @ Vds	190pF @ 15V
Power - Max	700mW
Packaging	Digi-Reel?
Gate Charge (Qg) @ Vgs	3.5nC @ 10V
Package / Case	SuperSOT-6
FET Feature	Logic Level Gate
Drawing Number	*
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	FDC6506P FDC6506P FDC6506PDKR ND FDC6506PDKRND FDC6506PDKR

FDC6506P General Description

These P-Channel logic level MOSFETs are produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize on-state resistance and yet maintain low gate charge for superior switching performance.

These devices have been designed to offer exceptional power dissipation in a very small footprint for applications where the bigger more expensive SO-8 and TSSOP-8 packages are impractical.

FDC6506P Maximum Ratings

Symbol	Parameter	Ratings	Units
V_DSS	Drain-Source Voltage	-30	V
V_GSS	Gate-Source Voltage	± 20	V
I_D	Drain Current - Continuous (Note 1a) - Pulsed	-1.8	A
I_D	Drain Current - Continuous (Note 1a) - Pulsed	-10	A
P_D	Power Dissipation for Single Operation (Note 1a) (Note 1b) (Note 1c)	0.96	W
		0.9
		0.7
T_J, T_stg	Operating and Storage Junction Temperature Range	-55 to +150	°C

FDC6506P Features

• -1.8 A, -30 V. R_DS(on)= 0.170 Ω @ VGS = -10 V
R_DS(on)= 0.280 Ω @ VGS = -4.5V
• Low gate charge (2.3nC typical).
• Fast switching speed.
• High performance trench technology for extremely low R_DS(on)• SuperSOTTM-6 package: small footprint (72% smaller than standard SO-8); low profile (1mm thick).

FDC6506P Typical Application

• Load switch
• Battery protection
• Power management

FDC653N Parameters

Technical/Catalog Information	FDC653N
Vendor	Fairchild Semiconductor
Category	Discrete Semiconductor Products
Mounting Type	Surface Mount
FET Polarity	N-Channel
Drain to Source Voltage (Vdss)	30V
Current - Continuous Drain (Id) @ 25° C	5A
Rds On (Max) @ Id, Vgs	35 mOhm @ 5A, 10V
Input Capacitance (Ciss) @ Vds	350pF @ 15V
Power - Max	800mW
Packaging	Tape & Reel (TR)
Gate Charge (Qg) @ Vgs	17nC @ 10V
Package / Case	SSOT-6
FET Feature	Logic Level Gate
Drawing Number	*
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	FDC653N FDC653N FDC653NTR ND FDC653NTRND FDC653NTR

FDC653N General Description

This N-Channel enhancement mode power field effect transistors is produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications in notebook computers, portable phones, PCMICA cards, and other battery powered circuits where fast switching, and low in-line power loss are needed in a very small outline surface mount package.

FDC653N Maximum Ratings

Symbol	Parameter		Ratings	Units
VDSS VGSS	Drain-Source Voltage Gate-Source Voltage		30 ±20 5 15 1.6 0.8 -55 to 150	V V A W °C
ID	Drain Current Continuous Pulsed	(Note 1a)
PD	Power Dissipation for Single Operation	(Note 1a) (Note 1b)
TJ,TSTG	Operating and Storage Junction Temperature Range

THERMAL CHARACTERISTICS

RJA
RJC

Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case

(Note 1a)
(Note 1)

78
30

°C/W
°C/W

FDC653N Features

·5 A, 30 V. RDS(ON) = 0.035 W @ VGS = 10 V RDS(ON) = 0.055 W @ VGS = 4.5 V.
·Proprietary SuperSOTTM-6 package design using copper lead frame for superior thermal and electrical capabilities.
·High density cell design for extremely low RDS(ON).
·Exceptional on-resistance and maximum DC current capability.

FDC653N Connection Diagram

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