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GS81602367-150, GS816032T, GS816036BGT-200

Table of contents:
Info of GS81602367-150
Info of GS816032T
Info of GS816036BGT-200

GS81602367-150, GS816032T, GS816036BGT-200 Selling Leads, Datasheet

MFG:GSI Package Cooled:2154 D/C:N/A

GS81602367-150, GS816032T, GS816036BGT-200 Picture

GS81602367-150, GS816032T, GS816036BGT-200 Datasheet download

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Part Number: GS81602367-150

MFG: GSI

Package Cooled: 2154

D/C: N/A

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GS816032T Maximum Ratings

Symbol	Description	Value	Unit
V_DD	Voltage on V_DD Pins	0.5 to 4.6	V
V_DDQ	Voltage in V_DDQPins	0.5 to 4.6	V
V_CK	Voltage on Clock Input Pin	0.5 to 6	V
V_I/O	Voltage on I/O Pins	0.5 to V_DDQ +0.5 ( 4.6 V max.)	V
V_IN	Voltage on Other Input Pins	0.5 to V_DD +0.5 ( 4.6 V max.)	V
I_IN	Input Current on Any Pin	+/20	mA
I_OUT	Output Current on Any I/O Pin	+/20	mA
P_D	Package Power Dissipation	1.5	W
T_STG	Storage Temperature	55 to 125
T_BIAS	Temperature Under Bias	55 to 125

GS816032T Features

• FTpin for user-configurable flow through or pipeline operation
• Single Cycle Deselect (SCD) operation
• 2.5 V or 3.3 V +10%/10% core power supply
• 2.5 V or 3.3 V I/O supply
• LBOpin for Linear or Interleaved Burst mode
• Internal input resistors on mode pins allow floating mode pins
• Default to Interleaved Pipeline mode
• Byte Write (BW) and/or Global Write (GW) operation
• Internal self-timed write cycle
• Automatic power-down for portable applications
• JEDEC-standard 100-lead TQFP package

GS816032T Typical Application

The GS816018/32/36T is an 18,874,368-bit (16,777,216-bit for x32 version) high performance synchronous SRAM with a 2-bit burst address counter. Although of a type originally developed for Level 2 Cache applications supporting high performance CPUs, the device now finds application in synchronous SRAM applications, ranging from DSP main store to networking chip set support.

GS816032T Connection Diagram

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