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HD74LVC32TELL, HD74LVC373TELL, HD74LVC374A

Table of contents:
Info of HD74LVC32TELL
Info of HD74LVC373TELL
Info of HD74LVC374A

HD74LVC32TELL, HD74LVC373TELL, HD74LVC374A Selling Leads, Datasheet

MFG:RENESAS Package Cooled:SMD D/C:06+

HD74LVC32TELL, HD74LVC373TELL, HD74LVC374A Picture

HD74LVC32TELL, HD74LVC373TELL, HD74LVC374A Datasheet download

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Part Number: HD74LVC32TELL

MFG: RENESAS

Package Cooled: SMD

D/C: 06+

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HD74LVC374A General Description

The HD74 LVC374A has eight edge trigger D type flip flops with three state outputs in a 20 pin package. Data at the D inputs meeting set up requirements, are transferred to the Q outputs on positive going transitions of the clock input. When the clock input goes low, data at the D inputs will be retained at the outputs until clock input returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. Low voltage and high speed operation is suitable at the battery drive product (note type personal computer) and low power consumption extends the life of a battery for long time operation.

HD74LVC374A Maximum Ratings

Item	Symbol	Ratings	Unit	Conditions
Supply voltage	V_CC	0.5 to 6.0	V
Input diode current	I_IK	50	mA	V_I = 0.5 V
Input voltage	V_I	0.5 to 6.0	V
Output diode current	I_OK	50	mA	V_O = 0.5 V
Output diode current	I_OK	50	mA	V_O = V_CC+0.5 V
Output voltage	V_O	0.5 to V_CC +0.5	V	Output "H" or "L"
Output voltage	V_O	0.5 to 6.0	V	Output "Z" or V_CC:OFF
Output current	I_O	±50	mA
V_CC, GND current / pin	I_CC or I_GND	100	mA
Storage temperature	T_stg	65 to +150

HD74LVC374A Features

` V_CC= 2.7 to 5.5 V
` All inputs V_IH (Max) = 5.5 V (@V_CC = 0 to 5.5 V)
` All outputs V_O(Max) = 5.5 V (@V_CC= 0 V or output off state)
` Typical V_OL ground bounce < 0.8 V (@V_CC = 3.3 V, Ta = 25°C)
` Typical V_OH undershoot > 2.0 V (@V_CC = 3.3 V, Ta = 25°C)
` High output current ±24 mA (@VCC = 3.0 to 5.5 V)

HD74LVC374A Connection Diagram

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