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HDMP-0452, HDMP-0480, HDMP0482

Table of contents:
Info of HDMP-0452
Info of HDMP-0480
Info of HDMP0482

HDMP-0452, HDMP-0480, HDMP0482 Selling Leads, Datasheet

MFG:Agilent Package Cooled:QFP D/C:2004

HDMP-0452, HDMP-0480, HDMP0482 Datasheet download

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Part Number: HDMP-0452

MFG: Agilent

Package Cooled: QFP

D/C: 2004

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HDMP-0452 General Description

The HDMP-0452 is a Quad Port Bypass Circuit (PBC) with a Clock and Data Recovery (CDR) circuit included. This device minimizes part count, cost and jitter accumulation while repeating incoming signals. Port Bypass Circuits are used in hard disk arrays constructed in Fibre Channel Arbitrated Loop (FC-AL) configurations. By using Port Bypass Circuits, hard disks may be pulled out or swapped while other disks in the array are available to the system.

A Port Bypass Circuit (PBC) consists of multiple 2:1 multiplexers daisy chained along with a CDR. Each port has two modes of operation: "disk in loop" and "disk bypassed". When the "disk in loop" mode is selected, the loop goes into and out of the disk drive at that port. For example, data goes from the HDMP-0452's TO_NODE[n]± differential output pins to the Disk Drive Transceiver IC's (e.g., an HDMP-1536A) Rx± differential input pins. Data from the Disk Drive Transceiver IC's Tx± differential outputs goes to the HDMP-0452's FM_NODE[n]± differential input pins. Figures 3 and 4 show connection diagrams for disk drive array applications. When the "disk bypassed" mode is selected, the disk drive is either absent or nonfunctional and the loop bypasses the hard disk.

The "disk bypassed" mode is enabled by pulling the BYPASS[n] pin low. Leave BYPASS[n] floating to enable the "disk in loop" mode. HDMP- 0452s may be cascaded with other members of the HDMP-04XX/ HDMP-05XX family through the FM_LOOP and TO_LOOP pins to accommodate any number of hard disks. See Table 2 to identify which of the 5 cells (0:4) will provide FM_LOOP and TO_LOOP pins (cable connections). The unused cells in this PBC may be bypassed by using pulldown resistors on the BYPASS[n] pins for these cells.

HDMP-0452 Maximum Ratings

SYMBOL	Parameter	Units	MIN	MAX
V_CC	Supply Voltage	V	-0.7	4.0
V_IN,L_VTTL	LVTTL Input Voltage	V	-0.7	4.0
V_IN,H_{S_IN}	HS_IN Input Voltage (Differential)	mA	1.3	V_CC
I_O,L_VTTL	LVTTL Output Sink/Source Current	mA		±13
T_stg	Storage Temperature	°C	-65	+150
T_J	Junction temperature	°C	0	+125

HDMP-0452 Features

• Supports 1.0625 GBd fibre channel operation
• Supports 1.25 GBd Gigabit Ethernet (GE) operation
• Quad PBC/CDR in one package
• CDR location determined by choice of cable input/output
• Valid amplitude detection on FM_NODE[0] input
• Equalizers on all inputs
• High speed LVPECL I/O
• Buffered Line Logic (BLL) outputs (no external bias resistors required)
• 0.66 W typical power at VCC = 3.3 V
• 44 pin, 10 mm, low cost plastic QFP package

HDMP-0452 Typical Application

• RAID, JBOD, BTS cabinets
• 1 => 1-4 serial buffer with or w/o CDR

HDMP-0452 Connection Diagram

HDMP-0480 General Description

The HDMP-0480 is an Octal Cell Port Bypass Circuit (PBC). This device minimizes part count, cost and jitter accumulation. Port Bypass Circuits are used in hard disk arrays constructed in Fibre Channel Arbitrated Loop (FC-AL) configurations. By using Port Bypass Circuits, hard disks may be pulled out or swapped while other disks in the array are available to the system.

A Port Bypass Circuit (PBC) consists of multiple 2:1 multiplexers daisy chained along with a CDR. Each port has two modes of operation: "disk in loop" and "disk by-passed". When the "disk in loop" mode is selected, the loop goes into and out of the disk drive at that port. For example, data goes from the HDMP-0480's TO_NODE[n]± differential output pins to the Disk Drive Transceiver IC's (e.g. an HDMP-1636A) Rx± differential input pins. Data from the Disk Drive Transceiver IC's Tx± differential outputs goes to the HDMP- 0480's FM_NODE[n]± differential input pins. When the "disk bypassed" mode is selected, the disk drive is either absent or non-functional and the loop bypasses the hard disk.

The "disk bypassed" mode is enabled by pulling the BYPASS[n]- pin low. Leave BYPASS[n]- floating to enable the "disk in loop" mode. HDMP-0480's may be cascaded with other members of the HDMP-04XX/HDMP-05XX family through the FM_NODE and TO_NODE pins to accommodate any number of hard disks.

The unused cells in this PBC may be bypassed by using pulldown resistors on the BYPASS[n]- pins for these cells. An HDMP-0480 may also be used as eight 1:1 buffers. In addition, an HDMP-0480 may be configured as four 2:1 multiplexers or as four 1:2 buffers.

HDMP-0480 Maximum Ratings

SYMBOL	Parameter	Units	MIN	MAX
V_CC	Supply Voltage	V	-0.7	4.0
V_IN,T_TL	TTL Input Voltage	V	-0.7	4.0
V_IN,H_{S_IN}	HS_IN Input Voltage	V	1.3	V_CC
I_O,T_TL	TTL Output Source Current	mA		13
T_STG	TTL Output Source Current	°C	-65	+150
T_j	Junction Temperature	°C	0	+125

HDMP-0480 Features

• Supports 1.0625 GBd fibre channel operation
• Supports 1.25 GBd gigabit Ethernet (GE) operation
• Octal cell PBC in one package
• Valid amplitude detection on FM_NODE[7] input
• Equalizers on all inputs
• High speed LVPECL I/O
• Buffered Line Logic (BLL) outputs (no external bias resistors required)
• 0.76 W typical power at Vcc=3.3V
• 64 Pin, 10 mm, low cost plastic QFP package

HDMP-0480 Typical Application

• RAID, JBOD, BTS cabinets
• Four 2:1 muxes
• Four 1:2 buffers
• 1 = > N gigabit serial buffer
• N = > 1 gigabit serial mux

HDMP-0480 Connection Diagram

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