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HYB39S16160AT10, HYB39S16160CT-7, HYB39S16160T10

Table of contents:
Info of HYB39S16160AT10
Info of HYB39S16160CT-7
Info of HYB39S16160T10

HYB39S16160AT10, HYB39S16160CT-7, HYB39S16160T10 Selling Leads, Datasheet

MFG:HYUNDAI Package Cooled:SO50 D/C:2006

HYB39S16160AT10, HYB39S16160CT-7, HYB39S16160T10 Picture

HYB39S16160AT10, HYB39S16160CT-7, HYB39S16160T10 Datasheet download

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Part Number: HYB39S16160AT10

MFG: HYUNDAI

Package Cooled: SO50

D/C: 2006

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HYB39S16160CT-7 General Description

The HYB39S16160CT-6/-7 are high speed dual bank Synchronous DRAM's based on SIEMENS 0.25mm process and organized as 2 banks x 512kbit x 16. These synchronous devices achieve high speed data transfer rates up to 166 MHz by employing a chip architecture that prefetches multiple bits and then synchronizes the output data to a system clock. The chip is fabricated with SIEMENS' advanced 16MBit DRAM process technology.

The device is designed to comply with all JEDEC standards set for synchronous DRAM products, both electrically and mechanically. All of the control, address, data input and output circuits are synchronized with the positive edge of an externally supplied clock.

Operating the two memory banks in an interleaved fashion allows random access operation to occur at higher rate than is possible with standard DRAMs. A sequential and gapless data rate of up to 166 MHz is possible depending on burst length, CAS latency and speed grade of the device.

Auto Refresh (CBR) and Self Refresh operation are supported. These devices operate with a single 3.3V +/- 0.3V power supply and are available in TSOPII packages.

These Synchronous DRAM devices are available with LV-TTL interfaces.

HYB39S16160CT-7 Maximum Ratings

Operating temperature range.............................. 0 to + 70 °C
Storage temperature range........................... 55 to + 150 °C
Input/output voltage ................... 0.5 to min(Vcc+0.5, 4.6) V
Power supply voltage VDD / VDDQ.................. 1.0 to + 4.6 V
Power Dissipation............................................. .................1 W
Data out current (short circuit) ........................................50 mA

Note: Stresses above those listed under "Absolute Maximum Ratings" may cause permanentdamage of the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

HYB39S16160CT-7 Features

• Fully Synchronous to Positive Clock Edge
• 0 to 70 °C operating temperature
• Dual Banks controlled by A11 ( Bank Select)
• Programmable CAS Latency : 2, 3
• Programmable Wrap Sequence : Sequential or Interleave
• Programmable Burst Length: 1, 2, 4, 8
• full page(optional) for sequencial wrap around
• Multiple Burst Read with Single Write Operation
• Automatic and Controlled Precharge Command
• Data Mask for Read / Write control
• Dual Data Mask for byte control ( x16)
• Auto Refresh (CBR) and Self Refresh
• Suspend Mode and Power Down Mode
• 4096 refresh cycles / 64 ms
• Latency 2 @ 125 MHz
• Latency 3 @ 166 MHz
• Random Column Address every CLK ( 1-N Rule)
• Single 3.3V +/- 0.3V Power Supply
• LVTTL Interface
• Plastic Packages: P-TSOPII-50 400mil width ( x16 )

HYB39S16160CT-7 Connection Diagram

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