IP113A, IP113ALF, IP-113BS-07S13 Selling Leads, Datasheet
MFG:ICPLUS Package Cooled:QFP D/C:08+
IP113A, IP113ALF, IP-113BS-07S13 Datasheet download
Part Number: IP113A
MFG: ICPLUS
Package Cooled: QFP
D/C: 08+
IP113A, IP113ALF, IP-113BS-07S13
- Table of contents:
Info of IP113A
Info of IP113ALF
Info of IP-113BS-07S13
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About IP113A
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Datasheet: IP113A
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About IP1001
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Datasheet: IP1001
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Manufacturer: IRF [International Rectifier]
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IP113A General Description
IP113A can be a 10/100BASE-TX to 100BASE-FX converter or a 100BASE-FX to 100BASE-FX repeater. It consists of a 2-port switch controller, a fast Ethernet transceiver and a PHY for 100BASE-FX. The transceivers in IP113A are designed in DSP approach with advance 0.25-um technology; this results in high noise immunity and robust performance.
IP113A not only supports store and forward mode, it also supports modified cut through mode and pure converter mode for low latency data forwarding. IP113A can transmit packet(s) up to 1600 bytes to meet requirement of extra long packets.
IP113A supports IEEE802.3x, collision base backpressure, and various LED functions, etc. These functions can be configured to fit the different requirements by feeding operation parameters via EEPROM interface or pull up/down resistors on specified pins.
IP113A Maximum Ratings
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. Functional performance and device reliability are not guaranteed under these conditions. All voltages are specified with respect to GND.
Supply Voltage........................0.3V to Vcc+0.3V
Input Voltage ........................0.3V to Vcc+0.3V
Output Voltage .......................0.3V to Vcc+0.3V
Storage Temperature .....................-55°C to 125°C
Ambient Operating Temperature (Ta) ..............0°C to 70°C
IP113A Features
` A 10/100BASE-TX/ 100BASE-FX converter
` Built in a 10/100BASE-TX transceiver
` Built in a PHY for 100BASE-FX
` Built in a 2-port switch
Pass all packets without address and CRC check (optional)
Supports modified cut-through frame forwarding for low latency
Supports pure converter mode data forwarding for extreme low latency
Supports flow control for full and half duplex operation
Bandwidth control
Forward 1600 bytes packet for management
Optional forward fragments
` Built in 128Kb RAM for data buffer
` Supports auto MDI-MDIX function
` Supports link fault pass through function
` Supports far end fault function
` LED display for link/activity, full/half, 10/100
` Built in a watchdog timer to monitor internal switch error
` Supports EEPROM Configuration
` 0.25u CMOS technology
` Single 2.5V power supply
` 48-pin LQFP package
` Built in a 10/100BASE-TX transceiver
` Built in a PHY for 100BASE-FX
` Built in a 2-port switch
Pass all packets without address and CRC check (optional)
Supports modified cut-through frame forwarding for low latency
Supports pure converter mode data forwarding for extreme low latency
Supports flow control for full and half duplex operation
Bandwidth control
Forward 1600 bytes packet for management
Optional forward fragments
` Built in 128Kb RAM for data buffer
` Supports auto MDI-MDIX function
` Supports link fault pass through function
` Supports far end fault function
` LED display for link/activity, full/half, 10/100
` Built in a watchdog timer to monitor internal switch error
` Supports EEPROM Configuration
` 0.25u CMOS technology
` Single 2.5V power supply
` 48-pin LQFP package
IP113A Typical Application
·Un-managed converter
IP113A Connection Diagram
IP113ALF General Description
IP113A LF can be a 10/100BASE-TX to 100BASE-FX converter. It consists of a 2-port switch controller, a fast Ethernet transceiver and a PHY for 100BASE-FX. The transceivers in IP113A LF are designed in DSP approach with advance 0.25-um technology; this results in high noise immunity and robust performance.
IP113A LF not only supports store and forward mode, it also supports modified cut through mode and pure converter mode for low latency data forwarding. IP113A LF can transmit packet(s) up to 1600 bytes to meet requirement of extra long packets.
IP113A LF supports IEEE802.3x, collision base backpressure, and various LED functions, etc. These functions can be configured to fit the different requirements by feeding operation parameters via EEPROM interface or pull up/down resistors on specified pins.
IP113ALF Maximum Ratings
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. Functional performance and device reliability are not guaranteed under these conditions. All voltages are specified with respect to GND.
Supply Voltage.................................... 0.3V to Vcc+0.3V
Input Voltage ......................................0.3V to Vcc+0.3V
Output Voltage ...................................0.3V to Vcc+0.3V
Storage Temperature ................................-55 to 125
Ambient Operating Temperature (Ta).............. 0to 70
Supply Voltage.................................... 0.3V to Vcc+0.3V
Input Voltage ......................................0.3V to Vcc+0.3V
Output Voltage ...................................0.3V to Vcc+0.3V
Storage Temperature ................................-55 to 125
Ambient Operating Temperature (Ta).............. 0to 70
IP113ALF Features
`A 10/100BASE-TX/ 100BASE-FX converter
`Built in a 10/100BASE-TX transceiver
`Built in a PHY for 100BASE-FX
`Built in a 2-port switch
Pass all packets without address and CRC check (optional)
Supports modified cut-through frame forwarding for low latency
Supports pure converter mode data forwarding for extreme low latency
Supports flow control for full and half duplex operation
Bandwidth control
Forward 1600 bytes packet for management
Optional forward fragments
`Built in 128Kb RAM for data buffer
`Supports auto MDI-MDIX function
`Supports link fault pass through function
`Supports far end fault function
`LED display for link/activity, full/half, 10/100
`Built in a watchdog timer to monitor internal switch error
`Supports EEPROM Configuration
`0.25u CMOS technology
`Single 2.5V power supply
`48-pin LQFP package
`Support Lead Free package (Please refer to the Order Information)
`Built in a 10/100BASE-TX transceiver
`Built in a PHY for 100BASE-FX
`Built in a 2-port switch
Pass all packets without address and CRC check (optional)
Supports modified cut-through frame forwarding for low latency
Supports pure converter mode data forwarding for extreme low latency
Supports flow control for full and half duplex operation
Bandwidth control
Forward 1600 bytes packet for management
Optional forward fragments
`Built in 128Kb RAM for data buffer
`Supports auto MDI-MDIX function
`Supports link fault pass through function
`Supports far end fault function
`LED display for link/activity, full/half, 10/100
`Built in a watchdog timer to monitor internal switch error
`Supports EEPROM Configuration
`0.25u CMOS technology
`Single 2.5V power supply
`48-pin LQFP package
`Support Lead Free package (Please refer to the Order Information)
IP113ALF Connection Diagram
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