IP161CS-10U, IP1726, IP175 Selling Leads, Datasheet
MFG:IP Package Cooled:QFP D/C:2007+
IP161CS-10U, IP1726, IP175 Datasheet download
Part Number: IP161CS-10U
MFG: IP
Package Cooled: QFP
D/C: 2007+
IP161CS-10U, IP1726, IP175
- Table of contents:
Info of IP161CS-10U
Info of IP1726
Info of IP175
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About IP1001
PDF/DataSheet Download
Datasheet: IP1001
File Size: 519701 KB
Manufacturer: IRF [International Rectifier]
Download : Click here to Download
About IP1001
PDF/DataSheet Download
Datasheet: IP1001
File Size: 519701 KB
Manufacturer: IRF [International Rectifier]
Download : Click here to Download
About IP175
PDF/DataSheet Download
Datasheet: IP175
File Size: 207825 KB
Manufacturer: IC Plus
Download : Click here to Download
IP175 General Description
IP175 is a 5 port 10/100 Ethernet integrated switch. It consists of a 5-port switch controller and five Fast Ethernet transceivers. Each of the transceivers complies with the IEEE802.3, IEEE802.3u, and IEEE802.3x specifications. The transceivers in IP175 are designed in DSP approach with advance 0.25um technology; this results in high noise immunity and robust performance.
The IP175 operates in store and forward mode. It stores the incoming packet to the internal SSRAM and learns the SA (source address) automatically if the packet is error free. The SA is stored in the internal address table. IP175 forwards a packet according to DA destination address and address table. When the segments of destination ports are free, it reads the packet from the internal SSRAM and forwards it to the appropriate ports according to the address table. The incoming packets with errors are dropped. IP175 supports IEEE802.3x, optional backpressure, and various LED functions, etc. These functions can be configured to fit the different requirements by feeding operation parameters via EEPROM interface or pull up/down resistors on specified pins.
IP175 Features
5 port 10/100 Ethernet switch with built in transceivers and memory
Build in SSRAM for frame buffer
Built in storage of 1K MAC address
Support flow control
- Support IEEE802.3x for flow control on full duplex mode operation
- Support back pressure for flow control in half duplex mode operation
A 5 port switching fabric
- Support two-level hashing algorithm to solve address collision
- Support address aging
- Store and forward mode
- Broadcast storm protection
- Full line speed capability of 148800 (14880) packets/sec for 100M (10M)
- Support 1536 byte data transfer for VLAN traffic
Integrate 5 ports transceiver
- Auto negotiation
- Fully digital adaptive equalizer and timing recovery module
- Base line Wander correction
- 10BaseTX, 100BaseTX, and 100BaseFX operation
Support one MII port for router application
LED status of Link, activity, Full/half duplex, and speed
LED with power on diagnostic function
Initial parameter setting by pin configuration or EEPROM
Utilize single clock source only (25Mhz)
Utilize single power (2.5v)
0.25um technology
Packaged in 128 pin PQFP
Build in SSRAM for frame buffer
Built in storage of 1K MAC address
Support flow control
- Support IEEE802.3x for flow control on full duplex mode operation
- Support back pressure for flow control in half duplex mode operation
A 5 port switching fabric
- Support two-level hashing algorithm to solve address collision
- Support address aging
- Store and forward mode
- Broadcast storm protection
- Full line speed capability of 148800 (14880) packets/sec for 100M (10M)
- Support 1536 byte data transfer for VLAN traffic
Integrate 5 ports transceiver
- Auto negotiation
- Fully digital adaptive equalizer and timing recovery module
- Base line Wander correction
- 10BaseTX, 100BaseTX, and 100BaseFX operation
Support one MII port for router application
LED status of Link, activity, Full/half duplex, and speed
LED with power on diagnostic function
Initial parameter setting by pin configuration or EEPROM
Utilize single clock source only (25Mhz)
Utilize single power (2.5v)
0.25um technology
Packaged in 128 pin PQFP
IP175 Connection Diagram
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