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IP1718, IP1726ALF, IP1726LF

Table of contents:
Info of IP1718
Info of IP1726ALF
Info of IP1726LF

IP1718, IP1726ALF, IP1726LF Selling Leads, Datasheet

MFG:IC Package Cooled:QFP D/C:05

IP1718, IP1726ALF, IP1726LF Datasheet download

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Part Number: IP1718

MFG: IC

Package Cooled: QFP

D/C: 05

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IP1726LF General Description

Supporting 24-port SS-SMII, 2-port MII and various advanced features, the IP1726 LF fits both the office switch and the ETTH( Ethernet to the Home) application. The IP1726 LF embeds internal SSRAM for the use of the packet buffer and the MAC address table. Besides the traditional switch functions, the IP1726 LF provides the easy-to-design solution, fitting the requirement of most switch application.

The IP1726 LF also supports some features which can simplify the customer's design from the viewpoint of the system. The embedded regulator controller can reduce the component number on the system board. The web management can be easily accomplished by adding an external CPU with protocol stack. All the I/O pins can operate at
3.3V or 1.8V, providing more design flexibility for power supply distribution.

The IP1726 LF embeds 1.5Mb internal packet buffer and stores up to 4K MAC address entries,making it suitable for the generic switch application. In addition, the IP1726 LF supports a wide range of data rate for both egress and ingress, which is useful in the ETTH(Ethernet to the Home) application. The higher layer data packet such as BPDU, IGMP, OSPF can be forwarded to either the 25th or 26th (CPU) port. The flexible trunk configuration allows the user to scale the switch interconnection bandwidth. When the port mirroring function is enabled, the data traffic on the source port will be forwarded to a specified destination port, making the switch administration easier. Supporting up to 26 port based VLAN groups, the IP1726 LF can be configured to fit various traffic partitions. The CoS function is accomplished by configuring the priority of the physical port, the 802.1Q VLAN tag and IP DSCP(Differentiated Service Code Point). In order to fit the application of some special environment,the address learning and the MAC address table aging can be disabled.

IP1726LF Maximum Ratings

Supply I/O V_DDI/O................... 0.5 +3.6V V
Voltage Core V_D DCore ............ 0.5 +1.9V V
Input Voltage V_I ................... 0.5 VDDI/O V
Output Voltage V_O ............... 0.5 VDDI/O V
Storage Temperature T_STG .......-65 +150
Operation Temperature T_OPT .........0 +70
Note: The maximum ratings are the limit value that must never be exceeded even for short time.

IP1726LF Features

` Embeds 1.5 Mb packet buffer
` Handles up to 4K MAC address entries
` Supports non-blocking wire speed operation
` Provides 24-port SS-SMII and 2-port MII
` Supports 2 ports selectable normal MII,reverse MII
` All I/O signals can operate at 3.3V or 1.8V.
` Supports up to 26 port based VLAN group
` Supports 256 levels of data rate control
` Captures BPDU, IGMP and OSPF .packet and forward to the 26th port.
` Suppress/enable per port address learning.
` Embeds two levels of priority queues for VLAN tag, physical port and IP Differentiated Service.
` Supports flexible port trunking configuration: up to 3 groups and up to 4 ports for each group
` Embeds an internal regulator controller to simplify the system design.
` Power supply: 1.8V for core logic; optional 3.3V or 1.8V for I/O.
` 128 pin QFP package
` Adjustable I/O driving capability
` Support packet length up to 1536 Bytes
` Spanning Tree state support.
` Supports 3 kinds of port mirrioring methods
` HOL blocking prevention
` Only one 25MHz crystal needed
` Broadcast storm control support
` Programmable MAC address table through 2 serial pins.
` Support Lead Free package (Please refer to the Order Information)

IP1726LF Connection Diagram

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