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Offered in 512Mx8bit or 256Mx16bit, the K9XXGXXXXM is 4G bit with spare 128M bit capacity. Its NAND cell provides the most cost-effective solution for the solid state mass storage market. A program operation can be performed in typical 300ms on the 2112- byte(X8 device) or 1056-word(X16 device) page and an erase operation can be performed in typical 2ms on a 128K-byte(X8 device) or 64K-word(X16 device) block. Data in the data page can be read out at 50ns cycle time per byte(30ns, only X8 3.3v device) or word(X16 device). The I/O pins serve as the ports for address and data input/output as well as command input. The on-chip write controller automates all program and erase functions including pulse repetition, where required, and internal verification and margining of data. Even the write-intensive systems can take advantage of the K9XXGXXXXM¢s extended reliability of 100K program/erase cycles by providing ECC(Error Correcting Code) with real time mapping-out algorithm. The K9XXGXXXXM is an optimum solution for large nonvolatile storage applications such as solid state file storage and other portable applications requiring non-volatility. An ultra high density solution having two 4Gb stacked with two chip selects is also available in standard TSOPI package.
K9K4G08U0M Maximum Ratings
Parameter
Symbol
Rating
Unit
K9K4GXXQ0M(1.8V)
K9XXGXXUXM(3.3V)
Voltage on any pin relative to VSS
VIN/OUT
-0.6 to + 2.45
-0.6 to + 4.6
V
VCC
-0.2 to + 2.45
-0.6 to + 4.6
Temperature Under Bias
K9XXGXXUXM-XCB0
TBIAS
-10 to +125
K9XXGXXUXM-XIB0
-40 to +125
Storage Temperature
K9K2G08U0A-VCB0
TSTG
-65 to +150
K9XXGXXUXM-XCB0
Short Circuit Current
IOS
5
mA
NOTE : 1. Minimum DC voltage is -0.6V on input/output pins. During transitions, this level may undershoot to -2.0V for periods <30ns. Maximum DC voltage on input/output pins is VCC,+0.3V which, during transitions, may overshoot to VCC+2.0V for periods <20ns. 2. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
K9K4G08U0M Features
· Voltage Supply -1.8V device(K9K4GXXQ0M): 1.70V~1.95V -3.3V device(K9XXGXXUXM): 2.7 V ~3.6 V · Organization - Memory Cell Array -X8 device(K9XXG08XXM) : (512M + 16,384K)bit x 8bit -X16 device(K9XXG16XXM) : (256M + 8,192K)bit x 16bit - Data Register -X8 device(K9XXG08XXM): (2K + 64)bit x8bit -X16 device(K9XXG16XXM): (1K + 32)bit x16bit - Cache Register -X8 device(K9XXG08XXM) : (2K + 64)bit x8bit -X16 device(K9XXG16XXM) : (1K + 32)bit x16bit · Automatic Program and Erase - Page Program -X8 device(K9XXG08XXM) : (2K + 64)Byte -X16 device(K9XXG16XXM) : (1K + 32)Word - Block Erase -X8 device(K9XXG08XXM) : (128K + 4K)Byte -X16 device(K9XXG16XXM) : (64K + 2K)Word · Page Read Operation - Page Size - X8 device(K9XXG08XXM) : 2K-Byte - X16 device(K9XXG16XXM) : 1K-Word - Random Read : 25ms(Max.) - Serial Access : 50ns(Min.) 30ns(Min., K9XXG08UXM only) 512M x 8 Bit / 256M x 16 Bit NAND Flash Memory · Fast Write Cycle Time - Program time : 300ms(Typ.) - Block Erase Time : 2ms(Typ.) · Command/Address/Data Multiplexed I/O Port · Hardware Data Protection - Program/Erase Lockout During Power Transitions · Reliable CMOS Floating-Gate Technology - Endurance : 100K Program/Erase Cycles - Data Retention : 10 Years · Command Register Operation · Cache Program Operation for High Performance Program · Power-On Auto-Read Operation · Intelligent Copy-Back Operation · Unique ID for Copyright Protection · Package : - K9XXGXXXXM-YCB0/YIB0 48 - Pin TSOP I (12 x 20 / 0.5 mm pitch) - K9W8G08U1M-YCB0/YIB0 : Two K9K4G08U0M stacked. 48 - Pin TSOP I (12 x 20 / 0.5 mm pitch) - K9XXGXXXXM-PCB0/PIB0 48 - Pin TSOP I (12 x 20 / 0.5 mm pitch) - K9W8G08U1M-PCB0/PIB0 : Two K9K4G08U0M stacked. 48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)