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KS865, KS8695, KS8695P

Table of contents:
Info of KS865
Info of KS8695
Info of KS8695P

KS865, KS8695, KS8695P Selling Leads, Datasheet

MFG:KEN.DIN Package Cooled:QFP128 D/C:05+

KS865, KS8695, KS8695P Datasheet download

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Part Number: KS865

MFG: KEN.DIN

Package Cooled: QFP128

D/C: 05+

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KS8695 General Description

The KS8695 "Multi-Port Gateway-on-a-Chip" delivers a new level of networking integration and performance for speeding broadband gateway development. The key components integrated in the KS8695 include:

• Integrated layer-2 managed switch with five Fast Ethernet transceivers and patented mixed-signal low-power technology; five MAC units; a high-speed non-blocking switch fabric; a dedicated address lookup engine; an on-chip frame buffer memory and LED controls. One port is partitioned for WAN interface with the other 4 ports for LAN access.

• A 185-MIPS ARM 922T processor with memory management unit (MMU) and 8kB I-cache and 8kB D-cache.

• An independent MAC unit supporting MAC or PHY mode MII interface for networking expansion. Block Diagram
• On checksum errors and TCP/UDP/IP packet header checksum generation. The protocol engine applies to the WAN, LAN and EMAC interfaces.

• DMA engines with burst mode support; Tx and Rx FIFOs to streamline the data transfers between WAN and CPU, CPU and LAN, CPU and EMAC.

• Shared programmable 8/16/32-bit data bus and 22-bit address bus with up to 64MB total memory space for SDRAM, ROM, Flash, SRAM and all peripheral devices.

• Other peripheral support logic including GPIO, a watchdog timer, an interrupt controller and a JTAG debugging interface.

Complete hardware & software reference designs are available.

The KS8695 represents a new level of total solution optimized for broadband gateway system development and renders speedy routing performance & connectivity interfaces for value-added networking expansions.

KS8695 Features

• The CENTAUR KS8695 featuring XceleRouter™ Technology, is a single-chip Multi-Port Gateway-on-a- Chip with all the key components integrated for a highperformance and low-cost broadband gateway
• ARM922T high-performance CPU core
- 185 MIPS ARM922T core at 166MHz
- 8kB I-cache and 8kB D-cache
- Memory Management Unit (MMU) for Linux
- 32-bit ARM and 16-bit Thumb instruction sets
• XceleRouter™ Technology
- TCP/UDP/IP packet header checksum generation to offload CPU tasks
- IPv4 packet filtering on checksum errors
- Automatic error packet discard
• Integrated switch engine & transceivers:
- Five 10/100 transceivers and MACs (1P for WAN interface, 4P for LAN switching)
- 100Base-Tx, 10Base-T and 100Base-Fx modes (Fx in the WAN port).
- On-chip SRAM as frame buffer memory
- Wire-speed switching
- VLAN ID and 802.1p tag/untag options
- Extensive MIB counter management support
- IGMP snooping for multicast packet filtering
- Port-based VLAN
- QoS/CoS packet prioritization support: per-port, 802.1p and DiffServ based
- 802.1d spanning tree protocol
- Dedicated 1K-entry look-up engine
- Automatic MDI/MDIX crossover on all ports
- Port mirroring/monitoring/sniffing
- Broadcast storm protection with % control
- Full and half-duplex flow control
• Memory and external I/O interfaces
- 8/16/32-bit wide shared data path for SDRAM, ROM/ SRAM/flash & external I/O
- Total memory space up to 64MB
- Intel/AMD-type flash support
• WAN/LAN/EMAC DMA Engines & FIFO
- DMA engine with burst mode support for efficient WAN, LAN and EMAC data transfers
- FIFOs for back-to-back packet transfers
• Peripheral Support
- One MII interface (MAC or PHY mode)
- 8/16/32-bit external I/O interface supporting PCMCIA or generic CPU/DSP host I/F
- Eight general-purpose input/output (GPIO)
- Two 32-bit timer counters (one watchdog)
- Interrupt controller
- ARM922T JTAG debug interface
• Power management
- Reduced CPU and system clock speeds
• System design
- 208-pin PQFP package
- Up to 166MHz CPU and 125MHz bus speed
• Reference HW/SW evaluation kit
- Hardware evaluation board (passes class B EMI)
- Board support package including firmware source codes, Linux kernel, software stacks
- Documentation for design & programming

KS8695 Typical Application

• Multi-port broadband gateway
• Multi-port firewall & VPN appliances
• Combo wireless and wireline gateway
• Multi-port VoIP gateway
• Fiber-to-the-Home managed CPE

KS8695P General Description

The CENTAUR KS8695P, Multi-Port PCI Gateway Solution, delivers a new level of networking integration, performance, and overall BOM cost savings, enabling original equipment manufacturers (OEMs) to provide customers with feature-rich, low-cost solutions for the residential gateway and small office environment.
• Integration of a PCI arbiter supporting three external masters.
Allows incorporation of a variety of productivity enhancing system interfaces, including the expanding 802.11 a/g/b wireless LAN.
• High-performance ARMTM CPU (ARM9) with 8KB
I-cache, 8KB D-cache, and a memory management unit (MMU) for Linux and WinCE® support.
• XceleRouterTM technology to accelerate packet processing.
• Proven wire-speed switching technology that includes 802.1Q tag-based VLAN and quality of service (QoS) support.
• Five patented mixed-signal, low-powered Fast Ethernet transceivers with corresponding media access control (MAC) units.
• Advanced memory interface with programmable 8/16/32-bit data and 22-bit address bus with up to 64MB of total memory space for Flash, ROM, SRAM, SDRAM, and external peripherals.

KS8695P Maximum Ratings

Absolute Maximum Ratings⁽¹⁾
Supply Voltage
(V_DDA1.8, V_DD1.8) ...........................................0.5V to +2.4V
(V_DDA3.3, V_DD3.3) ...........................................0.5V to +4.0V
Input Voltage (all inputs) ...............................0.5V to +4.0V
Output Voltage (all outputs) ..........................0.5V to +4.0V
Lead Temperature (soldering, 10sec.) ........................270°C
Pb (Lead) Free Temperature (soldering, 10sec) ..........260°C
Storage Temperature (T_S) .......................55°C to +150°C

Operating Ratings⁽²⁾
Supply Voltage
(V_DDA1.8, V_DD1.8 ............................................+1.7V to +1.9V
(V_DDA3.3, V_DD3.3)⁽³⁾.......................................+3.0V to +3.6V
Ambient Temperature (T_A) ..........................0°C to +70°C
Junction Temperature (T_J) ..........................................150°C
Package Thermal Resistance(4)
PBGA (_JA) No Air Flow ..........................................29.86°C/W
1m/s .....................................................................21.86°C/W
2m/s ......................................................................21.54°C/W
(_JC) No Air Flow ......................................................8.34°C/W

KS8695P Features

The CENTAUR KS8695P featuring XceleRouter technology is a single-chip, multi-port PCI "gateway-on-a-chip" with all the key components integrated for a high-performance and low-cost broadband gateway
• ARM9 High-Performance CPU Core
ARM9 core at 166MHz
8KB I-cache and 8KB D-cache
Memory management unit (MMU) for Linux and WinCE
32-bit ARM and 16-bit thumb instruction sets for smaller memory footprints
• 33MHz 32-Bit PCI Interface
Version PCI 2.1
Supports bus mastership or guest-mode
Supports normal and memory-mapped I/O
Support for miniPCI and cardbus peripherals
• Integrated Ethernet Transceivers and Switch Engine
Five 10/100 Ethernet transceivers and five MACs (1P for WAN interface, 4P for LAN switching)
100BASE-FX mode option on the WAN port and one LAN port
Automatic MDI/MDI-X crossover on all ports
Wire-speed, non-blocking switch
802.1Q tag-based VLAN (16 VLANs, full range VID)
Port-based VLAN
QoS/CoS packet prioritization support: per port, 802.1p, and DiffServ-based
64KB on-chip frame buffer SRAM
VLAN ID and 802.1P tag/untag option per port
802.1D Spanning Tree Protocol support
Programmable rate-limiting per port: 0Mbps to 100Mbps, ingress and egress, rate options for high and low priority
Extensive MIB counter management support
IGMP snooping for multicast packet filtering
Dedicated 1K entry look-up engine
Port mirroring/monitoring/sniffing
Broadcast and multicast storm protection with % control global and per port basis
Full- and half-duplex flow control
• XceleRouter Technology
TCP/UDP/IP packet header checksum generation to offload CPU tasks
IPv4 packet filtering on checksum errors
Automatic error packet discard
DMA engine with burst-mode support for efficient WAN/LAN data transfers
FIFOs for back-to-back packet transfers
• Memory and External I/O Interfaces
8/16/32-bit wide shared data path for Flash, ROM, SRAM, SDRAM, and external I/O
Total memory space up to 64MB
Intel^®/AMD^®-type Flash support
• Peripheral Support
8/16/32-bit external I/O interface supporting PCMCIA or generic CPU/DSP host I/F
Sixteen general purpose input/output (GPIO)
Two 32-bit timer counters (one watchdog)
Interrupt controller
• System Design
Up to 166MHz CPU and 125MHz bus speed
289 PBGA package (19mm x 19mm) saving board real estate
Two power supplies: 1.8V core and Ethernet RX supply, 3.3V I/O and Ethernet TX supply
Built-in LED controls
• Debugging
ARM9 JTAG debug interface
UART for console port or modem back-up
• Power Management
CPU and system clock speed step-down options
Low-power Ethernet transceivers
Per port power-down and Ethernet transmit disable
• Reference Hardware and Software Evaluation Kit
Hardware evaluation board (passes class B EMI)
Board support package including firmware source codes, Linux kernel, and software stacks
Complete hardware and software reference designs available

KS8695P Typical Application

• Multi-port wireless VoIP gateway
• Wireless mesh network node
• RG + combo 802.11 a/b/g/n access point
• Multimedia gateway
• Digital audio access point
• Network storage element
• Multi-port broadband gateway
• Multi-port firewall and VPN appliances
• Combination wireless and wireline gateway
• Fiber-to-the-home managed CPE

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