L64734, L64734-45, L64734C-25 Selling Leads, Datasheet
MFG:1406 Package Cooled:PQFP D/C:08+
L64734, L64734-45, L64734C-25 Datasheet download
Part Number: L64734
MFG: 1406
Package Cooled: PQFP
D/C: 08+
L64734, L64734-45, L64734C-25
- Table of contents:
Info of L64734
Info of L64734-45
Info of L64734C-25
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About L64734
PDF/DataSheet Download
Datasheet: L64734
File Size: 489559 KB
Manufacturer: LSI [LSI Computer Systems]
Download : Click here to Download
About L6402
PDF/DataSheet Download
Datasheet: L6402
File Size: 127061 KB
Manufacturer: GILWAY [Gilway Technical Lamp]
Download : Click here to Download
About L6402
PDF/DataSheet Download
Datasheet: L6402
File Size: 127061 KB
Manufacturer: GILWAY [Gilway Technical Lamp]
Download : Click here to Download
L64734 General Description
The L64733/34 chipset is designed specifically to meet the needs of satellite broadcast digital TV and is compliant with the European digital video broadcast (DVB-S) standard and the technical specifications for DSS systems. The chipset forms a complete "L-Band to bits" system.
A typical application of the L64733/34 chipset is satellite digital TV reception in accordance with ETS 300 421. Figure 1 shows the L64733/34 chipset satellite receiver implemented in a typical satellite receiver set-top decoder box.
L64734 Features
System Features
· Direct down-conversion
· Integrated programmable cut-off low-pass filters for variable-rate operation
· Dual AGC for optimizing performance with respect to intermodulation and noise
· Integrated synthesizer
· Integrated quadrature amplitude and phase imbalance compensation
· RF loop-through
Chipset Features
· Supports DVB and DSS system specifications
· BPSK/QPSK demodulation rates from 1 to 45 Mbaud
· Matched filter (square root raised cosine filter with roll-off factor of 20% or 35%)
· Anti-aliasing filters for operation from 1 to 45 Mbaud without switching external SAW filters or the need for low-pass filters
· On-chip digital clock synchronization
· On-chip digital carrier synchronization, featuring a frequency sweep capability for signal acquisition
· Auto-acquisition demodulator mode and tuner control through an on-chip microcontroller
· Integrated Phase-Locked Loop (PLL) for clock synthesis, allowing the use of a fundamental mode crystal
· Fast channel switching mode
· Power estimation for AGC control
· Programmable Viterbi decoder module for rates 1/2, 2/3, 3/4, 5/6, 6/7, 7/8
· Reed-Solomon decoder (204/188), (146/130)
· Auto-synchronization for Viterbi decoder
L64733/L64734 Tuner and Satellite Receiver Chipset
· Programmable synchronization for deinterleaver, Reed-Solomon decoder, and descrambler
· Bit error monitoring for channel performance measurements
· Deinterleaver (DVB and DSS)
· Serial host interface compatible with the LSI Logic Serial Control bus interface
· Power-down mode
· On-chip dual differential 6-bit ADCs
· Supports Synchronous Parallel Interface protocol for FEC data output
L64734 Connection Diagram
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