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LPC2478, LPC2478FBD144, LPC2478FBD208

Table of contents:
Info of LPC2478
Info of LPC2478FBD144
Info of LPC2478FBD208

LPC2478, LPC2478FBD144, LPC2478FBD208 Selling Leads, Datasheet

MFG:NXP Package Cooled:1200 D/C:08+

LPC2478, LPC2478FBD144, LPC2478FBD208 Picture

LPC2478, LPC2478FBD144, LPC2478FBD208 Datasheet download

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Part Number: LPC2478

MFG: NXP

Package Cooled: 1200

D/C: 08+

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LPC2478 General Description

NXP Semiconductors designed the LPC2478 microcontroller, powered by the ARM7TDMI-S core, to be a highly integrated microcontroller for a wide range of applications that require advanced communications and high quality graphic displays. The LPC2478 microcontroller has 512 kB of on-chip high-speed flash memory. This flash memory includes a special 128-bit wide memory interface and accelerator architecture that enables the CPU to execute sequential instructions from flash memory at the maximum 72 MHz system clock rate. This feature is available only on the LPC2000 ARM microcontroller family of products. The LPC2478, with real-time debug interfaces that include both JTAG and embedded trace, can execute both 32-bit ARM and 16-bit Thumb instructions.

The LPC2478 microcontroller incorporates an LCD controller, a 10/100 Ethernet Media Access Controller (MAC), a USB full-speed Device/Host/OTG Controller with 4 kB of endpoint RAM, four UARTs, two Controller Area Network (CAN) channels, an SPI interface, two Synchronous Serial Ports (SSP), three I2C interfaces, and an I2S interface.

Supporting this collection of serial communications interfaces are the following feature components; an on-chip 4 MHz internal oscillator, 98 kB of total RAM consisting of 64 kB of local SRAM, 16 kB SRAM for Ethernet, 16 kB SRAM for general purpose DMA, 2 kB of battery powered SRAM, and an External Memory Controller (EMC). These features make this device optimally suited for portable electronics and Point-of-Sale (POS) applications.

Complementing the many serial communication controllers, versatile clocking capabilities, and memory features are various 32-bit timers, a 10-bit ADC, 10-bit DAC, two PWM units, and up to 160 fast GPIO lines. The LPC2478 connects 64 of the GPIO pins to the hardware based Vector Interrupt Controller (VIC) that means these external inputs can generate edge-triggered interrupts. All of these features make the LPC2478 device particularly suitable for industrial control and medical systems.

LPC2478 Features

􀂄· ARM7TDMI-S processor, running at up to 72 MHz.
􀂄· 512 kB on-chip flash program memory with In-System Programming (ISP) and In-Application Programming (IAP) capabilities. Flash program memory is on the ARM local bus for high performance CPU access.
􀂄· 98 kB on-chip SRAM includes:
􀂋· 64 kB of SRAM on the ARM local bus for high performance CPU access.
􀂋· 16 kB SRAM for Ethernet interface. Can also be used as general purpose SRAM.
􀂋· 16 kB SRAM for general purpose DMA use also accessible by the USB.
􀂋· 2 kB SRAM data storage powered from the RTC power domain.
􀂄· LCD controller, supporting both Super-Twisted Nematic (STN) and Thin-Film Transistors (TFT) displays.
􀂋· Dedicated DMA controller.
􀂋· Selectable display resolution (up to 1024 × 768 pixels).
􀂋· Supports up to 24-bit true-color mode.
􀂄· Dual Advanced High-performance Bus (AHB) system allows simultaneous Ethernet DMA, USB DMA, and program execution from on-chip flash with no contention.
􀂄· EMC provides support for asynchronous static memory devices such as RAM, ROM and flash, as well as dynamic memories such as Single Data Rate SDRAM.
􀂄· Advanced Vectored Interrupt Controller (VIC), supporting up to 32 vectored interrupts.
􀂄· General Purpose AHB DMA controller (GPDMA) that can be used with the SSP, I²S, and SD/MM interface as well as for memory-to-memory transfers.
􀂄· Serial Interfaces:
􀂋· Ethernet MAC with MII/RMII interface and associated DMA controller. These functions reside on an independent AHB bus.
􀂋· USB 2.0 full-speed dual-port device/host/OTG controller with on-chip PHY and associated DMA controller.
􀂋· Four UARTs with fractional baud rate generation, one with modem control I/O, one with IrDA support, all with FIFO.
􀂋· CAN controller with two channels.
􀂋· SPI controller.
􀂋· Two SSP controllers, with FIFO and multi-protocol capabilities. One is an alternate for the SPI port, sharing its interrupt. SSPs can be used with the GPDMA controller.
􀂋· Three I2C-bus interfaces (one with open-drain and two with standard port pins).
􀂋· I²S (Inter-IC Sound) interface for digital audio input or output. It can be used with the GPDMA.
􀂄· Other peripherals:
􀂋· SD/MMC memory card interface.
􀂋· 160 General purpose I/O pins with configurable pull-up/down resistors.
􀂋· 10-bit ADC with input multiplexing among 8 pins.
􀂋· 10-bit DAC.
􀂋· Four general purpose timers/counters with 8 capture inputs and 10 compare outputs. Each timer block has an external count input.
􀂋· Two PWM/timer blocks with support for three-phase motor control. Each PWM has an external count inputs.
􀂋· Real-Time Clock (RTC) with separate power domain. Clock source can be the RTC oscillator or the APB clock.
􀂋· 2 kB SRAM powered from the RTC power pin, allowing data to be stored when the rest of the chip is powered off.
􀂋· WatchDog Timer (WDT). The WDT can be clocked from the internal RC oscillator,the RTC oscillator, or the APB clock.
􀂄· Single 3.3 V power supply (3.0 V to 3.6 V).
􀂄· 4 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used as the system clock.
􀂄· Three reduced power modes: idle, sleep, and power-down.
􀂄· Four external interrupt inputs configurable as edge/level sensitive. All pins on PORT0 and PORT2 can be used as edge sensitive interrupt sources.
􀂄· Processor wake-up from Power-down mode via any interrupt able to operate during Power-down mode (includes external interrupts, RTC interrupt, USB activity, Ethernet wake-up interrupt, CAN bus activity, PORT0/2 pin interrupt).
􀂄· Two independent power domains allow fine tuning of power consumption based on needed features.
􀂄· Each peripheral has its own clock divider for further power saving. These dividers help reduce active power by 20 % to 30 %.
􀂄· Brownout detect with separate thresholds for interrupt and forced reset.
􀂄· On-chip power-on reset.
􀂄· On-chip crystal oscillator with an operating range of 1 MHz to 24 MHz.
􀂄· On-chip PLL allows CPU operation up to the maximum CPU rate without the need for a high frequency crystal. May be run from the main oscillator, the internal RC oscillator, or the RTC oscillator.
􀂄· Boundary scan for simplified board testing.
􀂄· Versatile pin function selections allow more possibilities for using on-chip peripheral functions.
􀂄· Standard ARM test/debug interface for compatibility with existing tools.
􀂄· Emulation trace module supports real-time trace.

LPC2478 Typical Application

􀂄· Industrial control
􀂄· Medical systems
􀂄· Portable electronics
􀂄· Point-of-Sale (POS) equipment

LPC2478 Connection Diagram

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