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M50LPW040, M50LPW040N1, M50LPW080N5

M50LPW040, M50LPW040N1, M50LPW080N5 Selling Leads, Datasheet

MFG:ST  Package Cooled:PLCC32  D/C:03+

M50LPW040, M50LPW040N1, M50LPW080N5 Picture

M50LPW040, M50LPW040N1, M50LPW080N5 Datasheet download

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Part Number: M50LPW040

 

MFG: ST

Package Cooled: PLCC32

D/C: 03+

 

 

 
 
 
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  • Vendor: AMD D/C: 03+& Qty: 663  Adddate: 2026-07-11
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  • ASK SEMICONDUCTOR LTD   China
    Contact: Mr.Subaninfo@asksemi.com   MSN:asksemiconductor@hotmail.com
    Tel: 86-0755-33060075/0755-29183325/0755-83221176
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About M50LPW040

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Datasheet: M50LPW040

File Size: 279214 KB

Manufacturer: STMICROELECTRONICS [STMicroelectronics]

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  • Vendor: AMD D/C: 03+& Qty: 663  Adddate: 2026-07-11
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  • ASK SEMICONDUCTOR LTD   China
    Contact: Mr.Subaninfo@asksemi.com   MSN:asksemiconductor@hotmail.com
    Tel: 86-0755-33060075/0755-29183325/0755-83221176
    Fax: 86-0755-33060076
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About M50LPW040N1T

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Datasheet: M50LPW040N1T

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  • M500000000

  • Vendor: AMD D/C: 03+& Qty: 663  Adddate: 2026-07-11
  • Inquire Now
  • ASK SEMICONDUCTOR LTD   China
    Contact: Mr.Subaninfo@asksemi.com   MSN:asksemiconductor@hotmail.com
    Tel: 86-0755-33060075/0755-29183325/0755-83221176
    Fax: 86-0755-33060076
    (5)

About M50LPW080N5

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Datasheet: M50LPW080N5

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M50LPW040 General Description

The M50LPW040 is a 4 Mbit (512Kb x8) nonvolatile memory that can be read, erased and reprogrammed. These operations can be performed using a single low voltage (3.0 to 3.6V) supply. For fast programming and fast erasing in production lines an optional 12V power supply can be used to reduce the programming and the erasing times.

The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased. Blocks can be protected individually to prevent accidental Program or Erase commands from modifying the memory. Program and Erase commands are written to the Command Interface of the memory. An on-chip Program/Erase Controller simplifies the process of programming or erasing the memory by taking care of all of the special operations that are required to update the memory contents. The end of a program or erase operation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards.  Two different bus interfaces are supported by the memory. The primary interface is the Low Pin Count (or LPC) Standard Interface. This has been designed to remove the need for the ISA bus in current PC Chipsets; the M50LPW040 acts as the PC BIOS on the Low Pin Count bus for these PC Chipsets.

The secondary interface, the Address/Address  Multiplexed (or A/A Mux) Interface, is designed to be compatible with current Flash Programmers for production line programming prior to fitting to a PC Motherboard.

The memory is offered in TSOP40 (10 x 20mm) and PLCC32 packages and it is supplied with all the bits erased (set to '1').

M50LPW040 Maximum Ratings

Symbol
Parameter
Value
Unit
TA
Ambient Operating Temperature (Temperature Range Option 1) 0 to 70
Ambient Operating Temperature(Temperature Range Option 5)
20 to 85
TBIAS
Temperature Under Bias
50 to 125
TSTG
Storage Temperature
65 to 150
V

VIO (2)

Input or Output Voltage
0.6 to VCC + 0.6
V

VCC

Supply Voltage
0.6 to 4
V
VPP
Program Voltage
0.6 to 13
V

Note: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.
2. Minimum Voltage may undershoot to -2V and for less than 20ns during transitions. Maximum Voltage may overshoot to VCC +2V and for less than 20ns during transitions.


M50LPW040 Features

`SUPPLY VOLTAGE
   VCC = 3V to 3.6V for Program, Erase and Read Operations
   VPP = 12V for Fast Program and Fast Erase (optional)
`TWO INTERFACES
   Low Pin Count (LPC) Standard Interface for embedded operation with PC Chipsets.
   Address/Address Multiplexed (A/A Mux) Interface for programming equipment compatibility.
` LPC HARDWARE INTERFACE MODE
    5 Signal Communication Interface supporting Read and Write Operations
   Hardware Write Protect Pins for Block Protection
   Register Based Read and Write Protection
   5 Additional General Purpose Inputs for platform design flexibility
   Synchronized with 33 MHz PCI clock
` PROGRAMMING TIME
   10s typical
   Quadruple Byte Programming Option
` 8 UNIFORM 64 Kbyte MEMORY BLOCKS
`PROGRAM/ERASE CONTROLLER
   Embedded Byte Program and Block/Chip Erase algorithms
   Status Register Bits
` PROGRAM and ERASE SUSPEND
   Read other Blocks during Program/Erase Suspend
   Program other Blocks during Erase Suspend
` FOR USE in PC BIOS APPLICATIONS
` ELECTRONIC SIGNATURE
   Manufacturer Code: 20h
   Device Code: 26h
 

M50LPW040 Connection Diagram

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