M58LW64D, M58LW64D110N6P, M58MR016C Selling Leads, Datasheet
MFG:ST Package Cooled:BGA D/C:06+
M58LW64D, M58LW64D110N6P, M58MR016C Datasheet download

Part Number: M58LW64D
MFG: ST
Package Cooled: BGA
D/C: 06+
MFG:ST Package Cooled:BGA D/C:06+
M58LW64D, M58LW64D110N6P, M58MR016C Datasheet download

MFG: ST
Package Cooled: BGA
D/C: 06+
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PDF/DataSheet Download
Datasheet: M58LW64D
File Size: 802236 KB
Manufacturer: STMICROELECTRONICS [STMicroelectronics]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: M581
File Size: 112333 KB
Manufacturer: ETC [ETC]
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PDF/DataSheet Download
Datasheet: M58MR016C
File Size: 398883 KB
Manufacturer: STMICROELECTRONICS [STMicroelectronics]
Download : Click here to Download
The M58LW64D is a 64 Mbit (8Mb x 8 or 4Mbx16) non-volatile memory that can be read, erased and reprogrammed. These operations can be performed using a single low voltage (2.7V to 3.6V)core supply.M58LW64D has many unique features: (1) wide x8 or x16 data bus for high bandwidth; (2) enchanced security; (3) program and erase suspend; (4) common flash interface,etc
There are some maximum ratings about it. (1): temperature under bias(TBIAS) is40°C to 125°C; (2): storage Temperature(TSTG) is 55°C to 150 °C; (3): input or output voltage(VIO) is 0.6 V to VDDQ +0.6 V; (4): supply voltage (VDD, VDDQ) is 0.6 V to 5.0 V; (5): output short-circuit current(IOSC) is 100 mA.
Otherwise,there are some operating and AC measurement conditions. (1): supply voltage(VDD) is 2.7 V min and 3.6 V max; (2): input or output supply voltage(VDDQ) is 2.7 V min and 3.6 V max; (3): load capacitance(CL) is 30 pF; (4): input pulses voltages is 0 V to VDDQ.
The M58MR016 is a 16 Mbit non-volatile Flash memory that may be erased electrically at block level and programmed in-system on a Word-by- Word basis using a 1.7V to 2.0V VDD supply for the circuitry. For Program and Erase operations the necessary high voltages are generated internally.
The device supports synchronous burst read and asynchronous read from all the blocks of the memory array; at power-up the device is configured for page mode read. In synchronous burst mode, a new data is output at each clock cycle for frequencies up to 40MHz.
The array matrix organization allows each block to be erased and reprogrammed without affecting other blocks. All blocks are protected against programming and erase at Power-up.
Blocks can be unprotected to make changes in the application and then re-protected.
A parameter block "Security block" can be permanently protected against programming and erasing in order to increase the data security. An optional 12V VPP power supply is provided to speed up the program phase at costumer production. An internal command interface (C.I.) decodes the instructions to access/modify the memory content. The program/erase controller (P/E.C.) automatically executes the algorithms taking care of the timings necessary for program and erase operations. Two status registers indicate the state of each bank.
Instructions for Read Array, Read Electronic Signature, Read Status Register, Clear Status Register, Write Read Configuration Register, Program, Block Erase, Bank Erase, Program Suspend, Program Resume, Erase Suspend, Erase Resume, Block Protect, Block Unprotect, Block Locking, Protection Program, CFI Query, are written to the memory through a Command Interface (C.I.) using standard micro-processor write timings.
The memory is offered in TFBGA48, 0.5 mm ball pitch packages and it is supplied with all the bits erased (set to '1').
|
Symbol |
Parameter |
Value |
Unit |
|
TA |
Ambient Operating Temperature (2) |
40 to 85 |
°C |
|
TBIAS |
Temperature Under Bias |
40 to 125 |
°C |
|
TSTG |
Storage Temperature |
55 to 155 |
°C |
|
VIO(3) |
Input or Output Voltage |
0.5 to VDDQ+0.5 |
V |
|
VDD, VDDQ |
Supply Voltage |
0.5 to 2.7 |
V |
|
VPP |
Program Voltage |
0.5 to 13 |
V |

