MFG:MOT Package Cooled:RES FMF 21K5 1/8W 1% AXL D/C:09+
MFR4200, MFR4-21K5FI, MFR4-21K5-F-R Datasheet download
MFG: MOT
Package Cooled: RES FMF 21K5 1/8W 1% AXL
D/C: 09+
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PDF/DataSheet Download
Datasheet: MFR4200
File Size: 1825492 KB
Manufacturer: FREESCALE [Freescale Semiconductor, Inc]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: MFR4200
File Size: 1825492 KB
Manufacturer: FREESCALE [Freescale Semiconductor, Inc]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: MFR4200
File Size: 1825492 KB
Manufacturer: FREESCALE [Freescale Semiconductor, Inc]
Download : Click here to Download
This version of the MFR4200 communication controller block guide supports MFR4200 devices with the mask numbers 0L60X and 1L60X.
| Num | Rating | Symbol | Min | Max | Unit |
| 1 | I/O, Regulator and Analog Supply Voltage | VDD5 | -0.3 | 6.5 | V |
| 2 | Digital Logic Supply Voltage 2 | VDD | -0.3 | 3.0 | V |
| 3 | Oscillator Supply Voltage 2 | VDDOSC | -0.3 | 3.0 | V |
| 4 | Voltage difference VDDX to VDDR and VDDA | ∆VDDX | -0.3 | 3.0 | V |
| 5 | Voltage difference VSSX to VSSR and VSSA | ∆VSSX | -0.3 | 3.0 | V |
| 6 | Digital I/O Input Voltage | VIN | -0.3 | 3.0 | V |
| 7 | EXTAL, XTAL inputs | VILV | -0.3 | 3.0 | V |
| 8 | Instantaneous Maximum Current Single pin limit for all digital I/O pins 3 |
ID | -25 | +25 | mA |
| 9 | Instantaneous Maximum Current Single pin limit for EXTAL, XTAL4 |
IDL | -25 | +25 | mA |
| 10 | Operating Temperature Range (packaged) | TA | -40 | +125 | |
| 11 | Operating Temperature Range (junction) | TJ | -40 | +150 | |
| 12 | Storage Temperature Range | Tstg | -65 | 155 |
1 Beyond absolute maximum ratings device might be damaged.
2 The device contains an internal voltage regulator to generate the logic and OSC supply out of the I/O supply. The absolute maximum ratings apply when the device is powered from an external source.
3 All digital I/O pins are internally clamped to VSSX and VDDX, VSSR and VDDR or VSSA and VDDA.
4 Those pins are internally clamped to VSSOSC and VDDOSC.
The MFR4200 provides the following features.
• The FlexRay protocol according to FlexRay Protocol Working document (PWD) V1.1, with differences described in the MFR4200 Protocol Implementation Document (PID)
• Data rate of up to 10 Mbit/s on each of two channels
• FlexRay frames with up to 254 payload bytes (padding is used for FlexRay payload data that exceeds 32-byte data size boundary)
• One configurable receive FIFO
• Configurable counters, status indicators, and interrupts dedicated to error signalling
• Measured value indicators for clock synchronization
• The status of up to four slots can be observed independently of CC receive message buffers
• Configurable error signaling
• Fractional macroticks (MT) supported for clock correction
• 59 message buffers, each with up to 32 payload bytes
• Message buffers configurable with state or event semantics
• Each message buffer can be configured as a receive message buffer, as a transmit message buffer (single or double), or as a part of the receive FIFO
• Receive background buffers for each channel
• The host accesses all buffers by means of three active message buffers (active transmit message buffer, active receive message buffer and active receive FIFO buffer)
• Filtering for frame ID, cycle counter, and channel for receive and transmit message buffers
• Filtering for frame ID, channel, and message ID for the receive FIFO
• Maskable interrupt sources provided over one interrupt line
• Two types of host interface: HCS12 interface and asynchronous memory interfaces
• Minislot action point offset is configurable
• Static slot action point offset is configurable
• Hardware selectable clock output to drive external host devices: disabled/4/10/40 MHz
• Electrical physical layer interface compatible with dedicated FlexRay physical layer. Industry standard RS485 physical layer interface also available.
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