Want to post a buying lead? If you are not a member yet, please select the specific/related part number first and then fill the quantity and your contact details in the "Request for Quotation Form" on the left, and then click "Send RFQ".Your buying lead can then be posted, and the reliable suppliers will quote via our online message system or other channels soon.
The MPC9449 is specifically designed to distribute LVCMOS compatible clock signals up to a frequency of 200 MHz. The device has 15 identical outputs, organized in 4 output banks. Each output bank provides a retimed or frequency divided copy of the input signal with a near zero skew. The output buffer supports driving of 50W terminated transmission lines on the incident edge: each output is capable of driving either one parallel terminated or two series terminated transmission lines.
Two selectable LVCMOS compatible clock inputs are available. This feature supports redundant differential clock sources. In addition, the MPC9449 accepts one differential PECL clock signal. The DSELx pins choose between division of the input reference frequency by one or two. The frequency divider can be set individually for each of the four output banks. Applying the OE control will force the outputs into high-impedance mode.
All inputs have an internal pull-up or pull-down resistor preventing unused and open inputs from floating. The device supports a 2.5V or 3.3V power supply and an ambient temperature range of 40°C to +85°C. The MPC9449 is pin and function compatible but performance-enhanced to the MPC949. The device is packaged in a 52-lead LQFP package.
MPC9449 Maximum Ratings
Symbol
Characteristics
Min
Max
Unit
Condition
VCC
Supply Voltage
-0.3
3.8
V
VIN
DC Input Voltage
-0.3
VCC + 0.3
V
VOUT
DC Output Voltage
-0.3
VCC + 0.3
V
IIN
DC Input Current
±20
mA
IOUT
DC Output Current
±50
mA
TS
Storage Temperature
-65
125
°C
a. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute-maximum-rated conditions is not implied
MPC9449 Features
• 15 LVCMOS compatible clock outputs • Two selectable LVCMOS and one differential LVPECL compatible clock inputs • Selectable output frequency divider (divide-by-one and divide-by-two) • Maximum clock frequency of 200 MHz • Maximum clock skew of 200 ps • High-impedance output control • 3.3V or 2.5V power supply • Drives up to 30 series terminated clock lines • Ambient temperature range 40°C to +85°C • 52 lead LQFP packaging • Supports clock distribution in networking, telecommunication and computing applications • Pin and function compatible to MPC949