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The PCA9557 is a silicon CMOS circuit which provides parallelinput/output expansion for SMBus and I2C applications. The PCA9557 consists of an 8-bit input port register, 8-bit output portregister, and an I2C/SMBus interface. It has low currentconsumption and a high impedance open drain output pin, I/O0. The system master can enable the PCA9557's I/O as either input or output by writing to the configuration register.
PCA9557 Maximum Ratings
symbol
partameter
conditions
MIN
MAX
unit
VDD
DC supply voltage
-0.5
6.0
V
VI
DC input voltage
VSS- 0.5
5.5
V
Ii
DC input current
-
±25
MA
IIHL(max)
Maximum allowed input current through protection diode (I/O1 - I/O7
VIVDD or V I VSS
-
±400
A
VI/O
DC voltage on an I/O as an input other than I/O0
VSS- 0.5
5.5
V
II/OI/O0
DC voltage on I/O0 as an input
VSS- 0.5
+400
°C
II/OI/O0
DC input current
-
-20
mA
IDD
DC output current on an I/O
-
85
mA
ISS
DC supply current
-
100
mA
Ptot
Total power dissipation
-
200
mW
Tstg
Storage temperature range
-65
+150
°C
Tamb
Operating ambient temperature
-40
+85
°C
PCA9557 Features
• Lower voltage, higher performance migration path for the PCA9556 • 8 general purpose input/output expander/collector • Input/output configuration register • Active HIGH polarity inversion register • I2C and SMBus interface logic • Internal power-on reset • Noise filter on SCL/SDA inputs • Active LOW reset input • 3 address pins allowing up to 8 devices on the I2C/SMBus • High impedance open drain on I/O0 • No glitch on power-up • Power-up with all channels configured as inputs • Low standby current • Operating power supply voltage range of 2.3 V to 5.5 V • 5 V tolerant inputs/outputs • 0 to 400 kHz clock frequency • ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101 • Latch-up testing is done to JESDEC Standard JESD78 which exceeds 100 mA