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PI74ALVCH16269A, PI74ALVCH16270, PI74ALVCH16271

Table of contents:
Info of PI74ALVCH16269A
Info of PI74ALVCH16270
Info of PI74ALVCH16271

PI74ALVCH16269A, PI74ALVCH16270, PI74ALVCH16271 Selling Leads, Datasheet

MFG:PERICOM Package Cooled:TSSOP56 D/C:0026

PI74ALVCH16269A, PI74ALVCH16270, PI74ALVCH16271 Picture

PI74ALVCH16269A, PI74ALVCH16270, PI74ALVCH16271 Datasheet download

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Part Number: PI74ALVCH16269A

MFG: PERICOM

Package Cooled: TSSOP56

D/C: 0026

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PI74ALVCH16270 General Description

Pericom Semiconductor's PI74ALVCH series of logic circuits areproduced in the Company's advanced 0.5 micron CMOStechnology, achieving industry leading speed.

This 12-bit to 24-bit registered bus exchanger is designed for 2.3Vo 3.6V Vcc operation.

The PI74ALVCH162268 is used for applications in which datamust be transferred from a narrow high-speed bus to a wide, lowerfrequency bus.

The device provides synchronous data exchange between the twoports. Data is stored in the internal registers on the low-to-hightransition of the clock (CLK) input when the appropriate clockenable (CLKEN) inputs are low. The select (SEL) line issynchronous with CLK and selects 1B or 2B input data for the Aoutputs.

For data transfer in the A-to-B direction, a two stage pipeline isprovided in the A-to-1B path, with a single storage register in theA-to-2B path. Proper control of these inputs allows two sequential12-bit words to be presented synchronously as a 24-bit word on theB-port. Data flow is controlled by the active-low output enables(OEA, OEB). These control terminals are registered so bus directionchanges are synchronous with CLK.

The B outputs, which are designed to sink up to 12mA, includeequivalent 26W resistors to reduce overshoot and undershoot.

To ensure the high-impedance state during power up or power own, a clock pulse should be applied as soon as possible and OE hould be tied to VCC through a pullup resistor, the minimum valueof the resistor is determined by the current-sinking capability ofthe driver. Because OE is being routed through a register, theactive state of the outputs cannot be determined prior to the arrivalof the first clock pulse.

Active bus-hold circuitry is provided to hold unused or floatingdata inputs at a valid logic level.

PI74ALVCH16270 Maximum Ratings

Storage Temperature .................................................................... 65°C to +150°C Ambient Temperature with Power Applied .................................... 40°C to +85°C Supply Voltage to Ground Potential (Inputs & Vcc Only) .............. 0.5V to +7.0V Supply Voltage to Ground Potential (Outputs & D/O Only) ........... 0.5V to +7.0V DC Input Voltage ............................................................................ 0.5V to +7.0V DC Output Current ..................................................................................... 120 mA Power Dissipation ..........................................................................................1.0W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

PI74ALVCH16270 Features

• PI74ALVCH16270 is designed for low voltage operation
• VCC = 2.3V to 3.6V
• Hysteresis on all inputs
• Typical VOLP (Output Ground Bounce)< 0.8V at VCC = 3.3V, TA = 25°C
• Typical VOHV (Output VOH Undershoot)< 2.0V at VCC = 3.3V, TA = 25°C
• Bus Hold retains last active bus state during 3-STATE,eliminating the need for external pullup resistors
• Industrial operation at –40°C to +85°C
• Packages available:– 56-pin 240 mil wide plastic TSSOP (A) 56-pin 300 mil wide plastic SSOP (V)

PI74ALVCH16270 Connection Diagram

PI74ALVCH16271 General Description

Pericom Semiconductor's PI74AVC series of logic circuits are produced using the Company's advanced 0.35 micron CMOS technology, achieving industry leading speed. This 12-bit to 24-bit multiplexed bus exchanger is designed for 2.3V to 3.6V VCC operation.

The PI74ALVCH16271is intended for applications in which two separate data paths must be multiplexed onto, or demultiplexed from, a single data path. This device is particularly suitable as an interface between conventional DRAMs and high-speed microprocessors Data is stored in the internal A-to-B registers on the low-to-high transition of the clock (CLK) input, provided clock-enable (CLKENA) inputs are low. Proper control of these inputs allows two sequential 12-bit words to be presented as a 24-bit word on the B port.

To maximize memory access throughput, transparent latches in the B-to-A path allow asynchronous operation. These latches transfer data when the latch-enable (LE) inputs are low. The select (SEL) line selects 1B or 2B data for the A outputs. Data flow is controlled by the active-low output enables (OEA, OEB).

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor, the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

PI74ALVCH16271 Maximum Ratings

Storage Temperature .................................................. –65°C to +150°C
Supply Voltage Range, VCC ........................................... –0.5V to 4.6V
Input Voltage Range,VI :
Except I/O ports (See Note 1): ........................................ –0.5V to 4.6V
I/O ports (See Notes 1 and 2) .............................. –0.5V to VCC + 0.5V
Output Voltage Range, VO (See Notes 1and 2) .. –0.5V to VCC + 0.5V
Input Clamp current, IIK (VI < 0) .............................................. –50mA
Output Clamp current, IOK (VO < 0 or VO > VCC) ...................±50mA
Continous Output Current, IO (VO = 0 to VCC) ........................±50mA
Continous Current through each VCC or GND ........................±100mA
Maximum Power Dissipation:
A package ................................................................... 1W
V package ................................................................ 1.4W

Note:
Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

PI74ALVCH16271 Features

· PI74ALVCH16271 is designed for low voltage operation, VCC = 2.3V to 3.6V
· Hysteresis on all inputs
· Typical VOLP (Output Ground Bounce) < 0.8V at VCC = 3.3V, TA = 25°C
· Typical VOHV (Output VOH Undershoot) < 2.0V at VCC = 3.3V, TA = 25°C
· Bus Hold retains last active bus state during 3-State, eliminating the need for external pullup resistors
· Industrial operation at –40°C to +85°C
· Packages available: - 56-pin 240 mil wide plastic TSSOP (A56) - 56-pin 300 mil wide plastic SSOP (V56)

PI74ALVCH16271 Connection Diagram

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