SN74LVC1G04, SN74LVC1G04DBNR, SN74LVC1G04DBV Selling Leads, Datasheet
MFG:TI Package Cooled:SO23-5 D/C:07+
SN74LVC1G04, SN74LVC1G04DBNR, SN74LVC1G04DBV Datasheet download
Part Number: SN74LVC1G04
MFG: TI
Package Cooled: SO23-5
D/C: 07+
SN74LVC1G04, SN74LVC1G04DBNR, SN74LVC1G04DBV
- Table of contents:
Info of SN74LVC1G04
Info of SN74LVC1G04DBNR
Info of SN74LVC1G04DBV
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About SN74LVC1G04
PDF/DataSheet Download
Datasheet: SN74LVC1G04
File Size: 467778 KB
Manufacturer: TI [Texas Instruments]
Download : Click here to Download
About SN7000
PDF/DataSheet Download
Datasheet: SN7000
File Size: 81454 KB
Manufacturer: SIEMENS [Siemens Semiconductor Group]
Download : Click here to Download
About SN74LVC1G04DBV
PDF/DataSheet Download
Datasheet: SN74LVC1G04DBV
File Size: 467778 KB
Manufacturer: TI [Texas Instruments]
Download : Click here to Download
SN74LVC1G04 General Description
This device is designed for 1.65-V to 5.5-V V CC operation.
The SN74LVC1G04 is a single 3-input positive OR-AND gate. It performs the Boolean function Y = (A + B) ⋅ C in positive logic.
By tying one input to GND or V CC , the SN74LVC1G3208 offers two more functions. When C is tied to V CC , this device performs as a 2-input OR gate (Y = A + B). When A is tied to GND, the device works as a 2-input AND gate (Y = B ⋅ C). This device also works as a 2-input AND gate when B is tied to GND (Y = A ⋅ C).
NanoStar ™ and NanoFree ™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using I off . The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
SN74LVC1G04 Maximum Ratings
| MIN MAX | UNIT | ||
| VCC Supply voltage range | 0.5 6.5 | V | |
| VI Input voltage range | 0.5 6.5 | V | |
| VO Voltage range applied to any output in the high-impedance or power-off state | 0.5 6.5 | V | |
| VO Voltage range applied to any output in the high or low state | 0.5 VCC + 0.5 | V | |
| IIK Input clamp current | V I < 0 | 50 | mA |
| IOK Output clamp current | V O < 0 | 50 | mA |
| IO Continuous output current | ± 50 | mA | |
| Continuous current through V CC or GND | ± 100 | mA | |
| JA Package thermal impedance | DBV package | 206 | ° C/W |
| DCK package | 252 | ||
| DRL package | 142 | ||
| YEA/YZA package | 154 | ||
| YEP/YZP package | 132 | ||
| YZV package | TBD | ||
| Tstg Storage temperature ran | |||
SN74LVC1G04 Features
• Available in the Texas Instruments NanoStar ™ and NanoFree ™ Packages
• Supports 5-V V CC Operation
• Inputs Accept Voltages to 5.5 V
• Max t pd of 5 ns at 3.3 V
• Low Power Consumption, 10- µ A Max I CC
• ± 24-mA Output Drive at 3.3 V
• Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at the Input (V hys = 250 mV Typ @ 3.3 V)
• Can Be Used in Three Combinations:
OR-AND Gate
OR Gate
AND Gate
• I off Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
• Supports 5-V V CC Operation
• Inputs Accept Voltages to 5.5 V
• Max t pd of 5 ns at 3.3 V
• Low Power Consumption, 10- µ A Max I CC
• ± 24-mA Output Drive at 3.3 V
• Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at the Input (V hys = 250 mV Typ @ 3.3 V)
• Can Be Used in Three Combinations:
OR-AND Gate
OR Gate
AND Gate
• I off Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
SN74LVC1G04 Connection Diagram
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