STA4005, STA4009, STA400A Selling Leads, Datasheet
MFG:SK Package Cooled:SIP D/C:05+
STA4005, STA4009, STA400A Datasheet download
Part Number: STA4005
MFG: SK
Package Cooled: SIP
D/C: 05+
STA4005, STA4009, STA400A
- Table of contents:
Info of STA4005
Info of STA4009
Info of STA400A
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About STA001
PDF/DataSheet Download
Datasheet: STA001
File Size: 237395 KB
Manufacturer: STMICROELECTRONICS [STMicroelectronics]
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About STA001
PDF/DataSheet Download
Datasheet: STA001
File Size: 237395 KB
Manufacturer: STMICROELECTRONICS [STMicroelectronics]
Download : Click here to Download
About STA400A
PDF/DataSheet Download
Datasheet: STA400A
File Size: 932545 KB
Manufacturer: STMICROELECTRONICS [STMicroelectronics]
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STA400A General Description
The SDARS is a satellite transmission system based on two geostationary satellites on the East and West coasts of the Continental United States (CONUS). In the urban areas, where the line of sight reception of the satellites is difficult or not possible, the service is covered by terrestrial repeaters adopting a MultiCarrier Modulation scheme.
Designed for digital radio receivers compatible with the XMRadio SDARS System, the STA400A Channel Decoder integrates all the functions to demodu- late and decode the incoming satellite and terrestrial signals after the RF Front-End down-convertions: Analogto- Digital conversions, satellite and terrestrial demodulations, AGCs, frame synchronization and demultiplexing, Viterbi decoding, time and spatial diversity combining, Reed-Solomon decoding and deinterleaving, Prime Rate Channel (PRC) demultiplexing, Payload Channel (PC) selection.
At the end of the demodulation and decoding processes a configurable serial data stream is made available to STA450A, the Service/Source Decoder, via the PC BitStream interface.
STA400A Maximum Ratings
| Symbol | Parameter |
Value |
Unit |
| VDD, AVDD | 1.8V Power supply Voltage |
-0.5 to 2.5 |
V |
| VDD3 | 3.3V Power Supply Voltage |
-0.5 to 4 |
V |
| Vi | Voltage on input pin |
-0.5 to (Vdd3 + 0.5) |
V |
| VO | Voltage on output pin |
-0.5 to (Vdd3 + 0.5) |
V |
| Via | Voltage on analog input pin |
-0.8 to (AVdd + 0.8) |
V |
| VOa | Voltage on analog output pin |
-0.8 to (AVdd + 0.8) |
V |
| Tstg | Storage Temperature |
-50 to 150 |
|
| Toper | Operative ambient temperature |
-40 to +85 |
|
| Tj | Operating Junction Temperature |
-40 to +125 |
STA400A Features
FRONT END INTERFACE
` TWO INTERNAL 10 BIT A/D CONVERTERS
` TWO QPSK DEMODULATORS FOR SATELLITE BRANCH
` ONE MULTICARRIER DEMODULATOR FOR TERRESTRIAL BRANCH
` SATELLITE SYMBOL FREQUENCY: 1.64 MBAUD
` TERRESTRIAL SYMBOL FREQUENCY: 2.99 MBAUD
` DIGITAL ROOT RAISED COSINE NYQUIST FILTER: 15% ROLL-OFF
` FFT LENGTH: 768 SUB-CARRIERS
` FULL DIGITAL CARRIER AND FREQUENCY RECOVERY AND TRACKING LOOPS
` FREQUENCY INVERSION COMPENSATION FOR HIGH-SIDE/LOW-SIDE MIXER INJECTION
` LOCK DETECTORS, C/N INDICATOR, ON CHIP BER ESTIMATORS
` TWO DIGITAL AGCs: INTERNAL SIGNAL POWER ESTIMATION AND FILTERING
` 1 BIT PDM AGCs CONTROL SIGNAL OUTPUTS
TDM DECODING AND MANAGEMENT
` SATELLITE AND TERRESTRIAL FRAME SYNCHRONIZATION
` SATELLITE PHASE AMBIGUITY RESOLUTION
` TDM DEMULTIPLEXING
` PRIME RATE CHANNEL (PRC)
DEMULTIPLEXING
` EXTERNAL MEMORY CONTROLLING
FORWARD ERROR CORRECTION
` VITERBI DECODER: K=7, R=1/3
` SATELLITE DEPUNCTURING: RATE 3/4
` TERRESTRIAL DEPUNCTURING: RATE 3/5
` CONVOLUTIONAL TIME DEINTERLEAVER OVER 4.7 SEC
` BLOCK DEINTERLEAVER OVER 2 RS BLOCKS
` REED-SOLOMON DECODER: (255,223). UP TO 16 BYTES CORRECTION CAPABILITY.
` ENERGY DISPERSAL DESCRAMBLER
` SAT-SAT AND TERR-SAT DIVERSITY COMBINING
BACK END INTERFACE
` TWO PAYLOAD CHANNEL BITSTREAM INTERFACES
` PAYLOAD CHANNEL SELECTION LOGIC
` DESIGNED TO WORK WITH THE STA450A SERVICE AND SOURCE DECODER
LOW POWER TECHNOLOGY
` 1.8V, 0.18m TECHNOLOGY
` 3.3V CAPABLE I/Os CONTROL
` IIC-BUS SLAVE CONTROL INTERFACE
` DEVICE ADDRESS: 1101010
` TWO INTERNAL 10 BIT A/D CONVERTERS
` TWO QPSK DEMODULATORS FOR SATELLITE BRANCH
` ONE MULTICARRIER DEMODULATOR FOR TERRESTRIAL BRANCH
` SATELLITE SYMBOL FREQUENCY: 1.64 MBAUD
` TERRESTRIAL SYMBOL FREQUENCY: 2.99 MBAUD
` DIGITAL ROOT RAISED COSINE NYQUIST FILTER: 15% ROLL-OFF
` FFT LENGTH: 768 SUB-CARRIERS
` FULL DIGITAL CARRIER AND FREQUENCY RECOVERY AND TRACKING LOOPS
` FREQUENCY INVERSION COMPENSATION FOR HIGH-SIDE/LOW-SIDE MIXER INJECTION
` LOCK DETECTORS, C/N INDICATOR, ON CHIP BER ESTIMATORS
` TWO DIGITAL AGCs: INTERNAL SIGNAL POWER ESTIMATION AND FILTERING
` 1 BIT PDM AGCs CONTROL SIGNAL OUTPUTS
TDM DECODING AND MANAGEMENT
` SATELLITE AND TERRESTRIAL FRAME SYNCHRONIZATION
` SATELLITE PHASE AMBIGUITY RESOLUTION
` TDM DEMULTIPLEXING
` PRIME RATE CHANNEL (PRC)
DEMULTIPLEXING
` EXTERNAL MEMORY CONTROLLING
FORWARD ERROR CORRECTION
` VITERBI DECODER: K=7, R=1/3
` SATELLITE DEPUNCTURING: RATE 3/4
` TERRESTRIAL DEPUNCTURING: RATE 3/5
` CONVOLUTIONAL TIME DEINTERLEAVER OVER 4.7 SEC
` BLOCK DEINTERLEAVER OVER 2 RS BLOCKS
` REED-SOLOMON DECODER: (255,223). UP TO 16 BYTES CORRECTION CAPABILITY.
` ENERGY DISPERSAL DESCRAMBLER
` SAT-SAT AND TERR-SAT DIVERSITY COMBINING
BACK END INTERFACE
` TWO PAYLOAD CHANNEL BITSTREAM INTERFACES
` PAYLOAD CHANNEL SELECTION LOGIC
` DESIGNED TO WORK WITH THE STA450A SERVICE AND SOURCE DECODER
LOW POWER TECHNOLOGY
` 1.8V, 0.18m TECHNOLOGY
` 3.3V CAPABLE I/Os CONTROL
` IIC-BUS SLAVE CONTROL INTERFACE
` DEVICE ADDRESS: 1101010
STA400A Connection Diagram
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