TAS3102ADBTR, TAS3103, TAS3103ADBTG4 Selling Leads, Datasheet
MFG:TI Package Cooled:TSSOP38 D/C:05+
TAS3102ADBTR, TAS3103, TAS3103ADBTG4 Datasheet download
Part Number: TAS3102ADBTR
MFG: TI
Package Cooled: TSSOP38
D/C: 05+
TAS3102ADBTR, TAS3103, TAS3103ADBTG4
- Table of contents:
Info of TAS3102ADBTR
Info of TAS3103
Info of TAS3103ADBTG4
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About TAS1020A
PDF/DataSheet Download
Datasheet: TAS1020A
File Size: 505117 KB
Manufacturer: TI [Texas Instruments]
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About TAS3103
PDF/DataSheet Download
Datasheet: TAS3103
File Size: 972703 KB
Manufacturer: TI [Texas Instruments]
Download : Click here to Download
About TAS1020A
PDF/DataSheet Download
Datasheet: TAS1020A
File Size: 505117 KB
Manufacturer: TI [Texas Instruments]
Download : Click here to Download
TAS3103 Maximum Ratings
Supply voltage range: VDDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 to 3.8 V
A_VDDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 to 3.8 V
Input voltage range, VI: 3.3-V LVCMOS . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VDDS + 0.5 V
1.8-V LVCMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .−0.5 V to AVDD(1) + 0.5 V
Output voltage range, VO:3.3-V LVCMOS . . . . . . . . . . . . . . . . . . . . . −0.5 V to VDDS + 0.5 V
1.8-V LVCMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to DVDD(2) + 0.5 V
1.8-V LVCMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .−0.5 V to AVDD(3) + 0.5 V
Input clamp current, IIK (VI < 0 or VI > DVDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > DVDD) . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Operating free-air temperature (Commercial) . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 70
Operating free-air temperature (Industrial) . . . . . . . . . . . . . . . . . . . . . . . . . . . −40 to 85
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65 to 150
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . 260
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. AVDD is a 1.8-V supply derived from a regulator in the TAS3103 chip. Pin XTALI is the only TAS3103 input that is referenced to this 1.8 V logic supply. The absolute maximum rating listed is for reference; only a crystal should be connected to XTALI.
2. DVDD is a 1.8-V supply derived from regulators internal to the TAS3103 chip. DVDD is routed to pin 29 (DVDD_BYPASS_CAP) to provide access to external filter capacitors, but should not be used to source power to external devices.
3. Pin XTALO is the only TAS3103 output that is derived from the internal 1.8-V logic supply AVDD. The absolute maximum rating listed is for reference; only a crystal should be connected to XTALO. AVDD is also routed to pin 6 (AVDD_BYPASS_CAP) to provide access to external filter capacitors, but should not be used to source power to external devices.
A_VDDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 to 3.8 V
Input voltage range, VI: 3.3-V LVCMOS . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VDDS + 0.5 V
1.8-V LVCMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .−0.5 V to AVDD(1) + 0.5 V
Output voltage range, VO:3.3-V LVCMOS . . . . . . . . . . . . . . . . . . . . . −0.5 V to VDDS + 0.5 V
1.8-V LVCMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to DVDD(2) + 0.5 V
1.8-V LVCMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .−0.5 V to AVDD(3) + 0.5 V
Input clamp current, IIK (VI < 0 or VI > DVDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > DVDD) . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Operating free-air temperature (Commercial) . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 70
Operating free-air temperature (Industrial) . . . . . . . . . . . . . . . . . . . . . . . . . . . −40 to 85
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65 to 150
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . 260
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. AVDD is a 1.8-V supply derived from a regulator in the TAS3103 chip. Pin XTALI is the only TAS3103 input that is referenced to this 1.8 V logic supply. The absolute maximum rating listed is for reference; only a crystal should be connected to XTALI.
2. DVDD is a 1.8-V supply derived from regulators internal to the TAS3103 chip. DVDD is routed to pin 29 (DVDD_BYPASS_CAP) to provide access to external filter capacitors, but should not be used to source power to external devices.
3. Pin XTALO is the only TAS3103 output that is derived from the internal 1.8-V logic supply AVDD. The absolute maximum rating listed is for reference; only a crystal should be connected to XTALO. AVDD is also routed to pin 6 (AVDD_BYPASS_CAP) to provide access to external filter capacitors, but should not be used to source power to external devices.
TAS3103 Features
• Audio Input/Output
− Four Serial Audio Input Channels
− Three Serial Audio Output Channels
− 8-kHz to 96-kHz Sample Rates Supported
− 15 Stereo/TDM Data Formats Supported
− Input/Output Data Format Selections Independent
− 16-, 18-, 20-, 24-, and 32-Bit Word Sizes Supported
• Serial Master/Slave I2C Control Channel
• Three Independent Monaural Processing Channels
− Programmable Four Stereo Input Digital Mixer
− 3D Effect and Reverb Structure and Filters
− Programmable 12 Band Digital Parametric EQ
− Programmable Digital Bass and Treble Controls
− Programmable Digital Soft Volume Control (24 dB to −- dB)
− Soft Mute/Unmute
− Programmable Dither
− Programmable Loudness Compensation
− VU Meter and Spectral Analysis I2C Output
− Programmable Channel Delay (Up to 42 ms at 48 kHz)
− 192-dB Dynamic Range (Supports Up to 32-Bit Audio Data)
− Dual Threshold Dynamic Range Compression/Expansion
• Electrical and Physical
− Single 3.3-V Power Supply
− 38-Pin TSSOP Package
− Low Power Standby
− Four Serial Audio Input Channels
− Three Serial Audio Output Channels
− 8-kHz to 96-kHz Sample Rates Supported
− 15 Stereo/TDM Data Formats Supported
− Input/Output Data Format Selections Independent
− 16-, 18-, 20-, 24-, and 32-Bit Word Sizes Supported
• Serial Master/Slave I2C Control Channel
• Three Independent Monaural Processing Channels
− Programmable Four Stereo Input Digital Mixer
− 3D Effect and Reverb Structure and Filters
− Programmable 12 Band Digital Parametric EQ
− Programmable Digital Bass and Treble Controls
− Programmable Digital Soft Volume Control (24 dB to −- dB)
− Soft Mute/Unmute
− Programmable Dither
− Programmable Loudness Compensation
− VU Meter and Spectral Analysis I2C Output
− Programmable Channel Delay (Up to 42 ms at 48 kHz)
− 192-dB Dynamic Range (Supports Up to 32-Bit Audio Data)
− Dual Threshold Dynamic Range Compression/Expansion
• Electrical and Physical
− Single 3.3-V Power Supply
− 38-Pin TSSOP Package
− Low Power Standby
TAS3103 Connection Diagram
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