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TC74AC11FN, TC74AC11P, TC74AC125F

TC74AC11FN, TC74AC11P, TC74AC125F Selling Leads, Datasheet

MFG:TOS  Package Cooled:SOP  D/C:96p3

TC74AC11FN, TC74AC11P, TC74AC125F Picture

TC74AC11FN, TC74AC11P, TC74AC125F Datasheet download

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Part Number: TC74AC11FN

 

MFG: TOS

Package Cooled: SOP

D/C: 96p3

 

 

 
 
 
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About TC74AC11FN

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Datasheet: TC74AC11FN

File Size: 194664 KB

Manufacturer: Toshiba

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  • TC74AC11P

  • Vendor: Toshiba Pack: DIP D/C: 06+& Qty: 1500 Note: ,,  Adddate: 2026-06-17
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  •   China
    Contact: Ms.Miss WANG  
    Tel: 86-021-61327535
    Fax: 86-021-51560779
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About TC74AC11P

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Datasheet: TC74AC11P

File Size: 194664 KB

Manufacturer: Toshiba

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About TC74AC125F

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Datasheet: TC74AC125F

File Size: 282030 KB

Manufacturer: TOSHIBA [Toshiba Semiconductor]

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TC74AC11FN General Description

The TC74AC11 is an advanced high speed CMOS 3-INPUT AND GATE fabricated with silicon gate and double-layer metal wiring C2MOS technology.

It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.

The internal circuit is composed of 4 stages including buffer output, which provide high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge or transient excess voltage.

TC74AC11FN Maximum Ratings

Characteristics Symbol Rating Unit
Supply voltage range VCC −0.5 to 7.0 V
DC input voltage VIN −0.5 to VCC + 0.5 V
DC output voltage VOUT −0.5 to VCC + 0.5 V
Input diode current IIK ±20 mA
Output diode current IOK ±50 mA
DC output current IOUT ±50 mA
DC VCC/ground current ICC ±100 mA
Power dissipation PD 500 (DIP) (Note 2)/180 (SOP) mW
Storage temperature Tstg -65~+150

Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc).
Note 2: 500 mW in the range of Ta = −40 to 65. From Ta = 65 to 85 a derating factor of −10 mW/ should be applied up to 300 mW.

TC74AC11FN Features

• High speed: tpd = 5.3 ns (typ.) at VCC = 5 V
• Low power dissipation: ICC = 4 A (max) at Ta = 25°C
• High noise immunity: VNIH = VNIL = 28% VCC (min)
• Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 transmission lines.
• Balanced propagation delays: tpLH ∼ − tpHL
• Wide operating voltage range: VCC (opr) = 2 to 5.5 V
• Pin and function compatible with 74F11

TC74AC11FN Connection Diagram

TC74AC11P General Description

The TC74AC11 is an advanced high speed CMOS 3-INPUT AND GATE fabricated with silicon gate and double-layer metal wiring C2MOS technology.

It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.

The internal circuit is composed of 4 stages including buffer output, which provide high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge or transient excess voltage.

TC74AC11P Maximum Ratings

Characteristics Symbol Rating Unit
Supply voltage range VCC −0.5 to 7.0 V
DC input voltage VIN −0.5 to VCC + 0.5 V
DC output voltage VOUT −0.5 to VCC + 0.5 V
Input diode current IIK ±20 mA
Output diode current IOK ±50 mA
DC output current IOUT ±50 mA
DC VCC/ground current ICC ±100 mA
Power dissipation PD 500 (DIP) (Note 2)/180 (SOP) mW
Storage temperature Tstg -65~+150

Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc).
Note 2: 500 mW in the range of Ta = −40 to 65. From Ta = 65 to 85 a derating factor of −10 mW/ should be applied up to 300 mW.

TC74AC11P Features

• High speed: tpd = 5.3 ns (typ.) at VCC = 5 V
• Low power dissipation: ICC = 4 A (max) at Ta = 25°C
• High noise immunity: VNIH = VNIL = 28% VCC (min)
• Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 transmission lines.
• Balanced propagation delays: tpLH ∼ − tpHL
• Wide operating voltage range: VCC (opr) = 2 to 5.5 V
• Pin and function compatible with 74F11

TC74AC11P Connection Diagram

TC74AC125F General Description

The TC74AC125/126 are advanced high speed CMOS QUAD BUS BUFFERs fabricated with silicon gate and double-layer metal wiring C2MOS technology.

They achieve the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.

The TC74AC125 requires the 3-state control input G to be set high to place the output into the high impedance state, whereas the TC74AC126 requires the control input to be set low to place the output into high impedance.

All inputs are equipped with protection circuits against static discharge or transient excess voltage.

TC74AC125F Maximum Ratings

Characteristics Symbol Value Unit
Supply voltage range VCC -0.5~7.0 V
DC input voltage VIN −0.5 to VCC + 0.5 V
DC output voltage VOUT −0.5 to VCC + 0.5 V
Input diode current IIK ±20 mA
Output diode current IOK ±50 mA
DC output current IOUT ±50 mA
DC VCC / ground current ICC ±100 mA
Power dissipation PD 500 (DIP) (Note 2)/180 (SOP/TSSOP) mW
Storage temperature Tstg −65 to 150

Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.

Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges.

Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc).

Note 2: 500 mW in the range of Ta = −40 to 65. From Ta = 65 to 85 a derating factor of −10 mW/ should be
applied up to 300 mW.

TC74AC125F Features

• High speed: tpd = 4.0 ns (typ.) at VCC = 5 V
• Low power dissipation: ICC = 8 A (max) at Ta = 25
• High noise immunity: VNIH = VNIL = 28% VCC (min)
• Symmetrical output impedance: |IOH| = IOL = 24 mA (min)
   Capability of driving 50 transmission lines.
• Balanced propagation delays: tpLH −∼ tpHL
• Wide operating voltage range: VCC (opr) = 2 to 5.5 V
• Pin and function compatible with 74F125/126

TC74AC125F Connection Diagram

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