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TC7MH373FK, TC7MH374FK, TC7MH4040FK

Table of contents:
Info of TC7MH373FK
Info of TC7MH374FK
Info of TC7MH4040FK

TC7MH373FK, TC7MH374FK, TC7MH4040FK Selling Leads, Datasheet

MFG:TOS Package Cooled:SSOP D/C:04+

TC7MH373FK, TC7MH374FK, TC7MH4040FK Picture

TC7MH373FK, TC7MH374FK, TC7MH4040FK Datasheet download

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Part Number: TC7MH373FK

MFG: TOS

Package Cooled: SSOP

D/C: 04+

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TC7MH373FK General Description

The TC7MH373FK is an advanced high speed CMOS octallatch with 3-state output fabricated with silicon gate C²MOS technology.

It achieves the high speed operation similar to equivalent bipolar schottky TTL while marinating the CMOS low power
dissipation.

This 8 bit D-type latch is controlled by a latch enable input (LE) and a output enable input (OE ).When the OE input is high, the eight outputs are in a high impedance state.

An input protection circuit ensures the 0 to 7 V can be applied to the input pins can be used to interface 5 V to 3 V systems and two supply systems such as battery back up.This circuit prevents destruction due to mismatched supply and input voltages.

TC7MH373FK Maximum Ratings

Characteristics	Symbol	Rating	Unit
Supply voltage range	V_CC	−0.5~7.0	V
DC input voltage	V_IN	−0.5~7.0	V
DC output voltage	V_OUT	−0.5~V_CC + 0.5	V
Input diode current	I_IK	-20	mA
Output diode current	I_OK	±20	mA
DC output current	I_OUT	±25	mA
DC V_CC/ground current	I_CC	±75	mA
Power dissipation	P_D	180	mW
Storage temperature	T_stg	−65~150

TC7MH373FK Features

• High speed: t_pd = 5.0 ns (typ.) (V_CC = 5 V)
• Low power dissipation: ICC = 4 A (max) (Ta = 25)
• High noise immunity: V_NIH = V_NIL = 28% V_CC (min)
• Power down protection is provided on all inputs.
• Balanced propagation delays: t_pLH −∼ t_pHL
• Wide operating voltage range: V_CC (opr) = 2~5.5 V
• Low noise: V_OLP = 0.8 (max)
• Pin and function compatible with 74ALS373

TC7MH373FK Connection Diagram

TC7MH374FK General Description

The TC7MH374FK is an advanced high speed CMOS octal flip-flop with 3-state output fabricated with silicon gate C²MOS technology.

It achieves the high speed operation similar to equivalent bipolar schottky TTL while maintaining the CMOS low power dissipation.

This 8-bit D-type flip-flop is controlled by a clock input (CK) and an output enable input (OE ).

When the OE input is high, the eight outputs are in a high impedance state.

An input protection circuit ensures that 0 to 7 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages.

TC7MH374FK Maximum Ratings

Characteristics	Symbol	Rating	Unit
Supply voltage range	V_CC	−0.5~7.0	V
DC input voltage	V_IN	−0.5~7.0	V
DC output voltage	V_OUT	−0.5~V_CC + 0.5	V
Input diode current	I_IK	-20	mA
Output diode current	I_OK	±20	mA
DC output current	I_OUT	±25	mA
DC V_CC/ground current	I_CC	±75	mA
Power dissipation	P_D	180	mW
Storage temperature	T_stg	−65~150

TC7MH374FK Features

• High speed: fmax = 185 MHz (typ.) (V_CC = 5 V)
• Low power dissipation: I_CC = 4 A (max) (Ta = 25°C)
• High noise immunity: V_NIH = V_NIL= 28% V_CC (min)
• Power down protection is provided on all inputs.
• Balanced propagation delays: t_pLH −∼ t_pHL
• Wide operating voltage range: V_CC _(opr) = 2~5.5 V
• Low noise: V_OLP = 0.8 V (max)
• Pin and function compatible with 74ALS374

TC7MH374FK Connection Diagram

TC7MH4040FK General Description

The TC7MH4040FK is an advanced high speed CMOS 12-stage ripple-carry binary counter fabricated with silicon gate C2MOS technology.

It achieves the high speed operation similar to equivalent bipolar schottky TTL while maintaining the CMOS low power
dissipation.

Setting CLR to high resets the counter to low.

A negative transition on the CK input brings one increment into the counter.

This counter provides all divided output stages, and at Q12, a 1/4096 divided frequency will be output.

An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage.

This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages.

TC7MH4040FK Maximum Ratings

Characteristics	Symbol	Rating	Unit
Power supply voltage	V_DD	-0.5~7.0	V
DC input voltage	V_IN	-0.5~7.0	V
DC output voltage	V_OUT	-0.5~7.0	V
Input diode current	IIK	-20	V
Output diode current	I_OK	±20	mA
DC output current	I_OUT	±25	mA
DC VCC/ground current	I_CC/I_GND	±100	mA
Power dissipation	P_D	180	Wm
Storage temperature	T_stg	-65~150

Note: Exceeding any of the absolute maximum ratings, even briefly, may lead to deterioration in IC performance or
even destruction.

Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges.

Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test report and estimated failure rate, etc).

TC7MH4040FK Features

• High speed: f_max = 210 MHz (typ.) (V_CC = 5 V)
• Low power dissipation: I_CC = 4 A (max) (T_a = 25°C)
• High noise immunity: V_NIH = V_NIL = 28% V_CC _(min)• Power down protection is provided on all inputs.
• Balanced propagation delays: t_pLH tpHL
• Wide operating voltage range: V_CC _(opr) = 2~5.5 V
• Low noise: V_OLP = 1.5 V (max)
• Pin and function compatible with 74HC4040

TC7MH4040FK Connection Diagram

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