UCS4810R-883, UCS580/H-883, UCS5800H

The UCS5800H has the following features including 4.4 MHz Minimum Data Input Rate;CMOS, PMOS, NMOS, TTL Compatible Inputs;Internal Pull-Down Resistors;Low-Power CMOS Control and Latches;High-Voltage, High-Current Outputs;Transient-Protected Outputs;Operating Temperature -55 to +125;High-Reliability Screening to MIL-STD-883, Class B.

Simplifying interface between LSI and peripheral power loads, the hermetically sealed UCS5800H (4-bit) and UCS5801 H (8-bit) latched drivers combine the advantages of CMOS logic and control and high-voltage, high-current bipolar output buffers. Typical applications include microprocessor interface to relays, solenoids, do and stepper motors printers, LED or incandescent displays and an operating temperature range of requiring hermetic packaging -55 to +125.BiMOS II latched drivers have data input rates faster than those of the original BiMOS circuits. With a 5 V logic supply, they will typically operate at better than 5 MHz. With a 12 V supply, significantly higher speeds are obtained. The CMOS inputs are compatible with standard CMOS, PMOS, and NMOS logic levels. TTL or DTL circuits may require the use of appropriate pull-up resistors.The Darlington open-collector outputs will drive power loads ratedto 50 V and 350 mA (500 mA, maximum). Integral diodes for inductive load transient suppression are included.Because of limitations on package power dissipation, the simultaneous operation of all drivers at high current can only be accomplished by a reduction in duty cycle.The 4-bit, UCS5800H is furnished in a standard 14-pin side-brazed hermetic package. The 8-bit, UCS5801 H is supplied in a 22-pin side-brazed nermeUC package witn row spacing on 0.400''(10.16 mm)centers. To simplify circuit board layout, all outputs are opposite their respective inputs. Both packages conform to the dimensional requirements of MIL-M-38510. High-temperature reverse-bias burn-in and 100% high-reliability screening to MIL-STD-883, Class B are standard.Output current rating may be limited by duty cycle, ambient temperature, air flow, and number of outputs conducting. Under any set of conditions, do not exceed a maximum junction temperature of +150.CMOS devices have input static protection Gut are susceptible to damage when exposed to extremely high static electrical charges.

Information present at an input is transferred to its latch when the STROBE is high. A high CLEAR input will set all latches to the output OFF condition regardless of the data or STROBE input levels. A high OUTPUT ENABLE will set all outputs to the OFF condition, regardless of any other input conditions. When the OUTPUT ENABLE is low, the outputs depend on the state of their respective latches.