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VSC7122, VSC71223RD, VSC7123

Table of contents:
Info of VSC7122
Info of VSC71223RD
Info of VSC7123

VSC7122, VSC71223RD, VSC7123 Selling Leads, Datasheet

MFG:2000 Package Cooled:QFP D/C:VSC

VSC7122, VSC71223RD, VSC7123 Datasheet download

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Part Number: VSC7122

MFG: 2000

Package Cooled: QFP

D/C: VSC

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VSC7122 General Description

The VSC7122 is a Quad Port Bypass Circuit (PBC). Four Fibre Channel PBC's are cascaded into a single art to minimize part count, cost, high frequency routing, and jitter accumulation. Port Bypass Circuits are used o provide resiliency in Fibre Channel Arbitrated Loop (FC-AL) architectures. PBC's are used within FC-AL isk arrays to allow for resiliency and hot swapping of FC-AL drives.

A Port Bypass Circuit is a 2:1 Multiplexer with two modes of operation: NORMAL and BYPASS. In NORMAL ode, the disk drive is connected to the loop. Data goes from the 7122's L_SOn pin to the Disk Drive RX nput and data from the disk drive TX output goes to the 7122's L_SIn pin. Refer to Figure 2 for disk drive pplication. In BYPASS mode, the disk drive is either absent or non-functional and data bypasses to the next vailable disk drive. Normal mode is enabled with a HIGH on the SEL pin and BYPASS mode is enabled by a OW on the SEL pin. Direct Attach Fibre Channel Disk Drives have an "LRC Interlock" signal defined to control he SEL function.

Using a VSC7122 in a single loop of a disk array is illustrated in Figure 2: "Disk Array Application". FCAL rives are all expected to be dual loop. The VSC7122 is cascaded in a manner such that all the 7122's internal BC's are used in the same loop. For dual loop implementations, two or more VSC7122's should be used. llocating each VSC7122 to only one of two loops preserves redundancy, prevents a single point of failure and ends itself to on-line maintainability.

The VSC7122 is very similar to the VSC7121 except that LSO+ outputs are all full power outputs identical o OUT. This is useful in passive backplanes to provide additional amplitude on long traces.

VSC7122 Maximum Ratings

TTL Power Supply Voltage (V_DD)............................................................................................... 0.5V to +4V
PECL DC Input Voltage (V_INP) ...................................................................................... -0.5V to V_DD +0.5V
TTL DC Input Voltage, (V_INT).................................................................................................. -0.5V to 5.5V
DC Voltage Applied to Outputs for High Output State (V_{IN TTL}) ................................. -0.5V to V_DD + 0.5V
TTL Output Current (I_OUT), (DC, Output High).................................................................................. 50mA
PECL Output Current (I_OUT), (DC, Output High) ..............................................................................-50mA
Case Temperature Under Bias, (T_C).............................................................................. -55°C to +125°C
Storage Temperature (T_STG)....................................................................................... -65°C to + 150°C

VSC7122 Features

• Supports ANSI X3T11 1.0625 Gbit/sec C-AL Disk Attach for Resiliency
• Fully Differential for Minimum itter Accumulation.
• Quad PBC's in Single Package
• TTL Bypass Select
• High Speed, PECL I/O's Referenced to VDD.
• 0.35W Typical Power Dissipation
• 3.3V Power Supply
• 44-Pin, 10mm PQFP

VSC7122 Connection Diagram

VSC7123 General Description

The VSC7123 is a full-speed Fibre Channel and Gigabit Ethernet Transceiver with industry-standard pinouts. The VSC7123 accepts 10-bit 8B/10B encoded transmit data, latches it on the rising edge of REFCLK and serializes the data onto the TX PECL differential outputs at a baud rate which is 10 times the REFCLK frequency. Serial data input on the RX PECL differential inputs is resampled by the Clock Recovery Unit (CRU) and deserialized onto the 10-bit receive data bus synchronously to complementary divide-by-twenty clocks. The VSC7123 receiver detects "Comma" characters for frame alignment. An analog/digital signal detection circuit indicates that a valid signal is present on the RX input. A cable equalizer compensates for InterSymbol Interference (ISI) in order to increase maximum cable distances. The VSC7123 is a higher performance, lower cost replacement for the VSC7125 and VSC7135.

VSC7123 Maximum Ratings

Power Supply Voltage (V_DD) Potential to GND.....................................-0.5V to +4V
DC Input Voltage (PECL inputs)............................................. -0.5V to V_DDP +0.5V
DC Input Voltage (TTL inputs) .......................................................... -0.5V to 5.5V
DC Output Voltage (TTL Outputs)........................................... -0.5V to V_DD + 0.5V
Output Current (TTL Outputs) .................................................................... ±50mA
Output Current (PECL Outputs)...................................................................+50mA
Case Temperature Under Bias .......................................................-55 to +125
Storage Temperature..................................................................... -65 to +150

VSC7123 Features

• 802.3z Gigabit Ethernet-Compliant 1.25 Gb/s Transceiver
• ANSI X3T11 Fibre Channel-Compliant 1.0625 Gb/s Transceiver
• 0.98 to 1.36 Gb/s Full-Duplex Operation
• 10-Bit TTL Interface for Transmit and Receive Data
• Automatic Lock-to-Reference
• RX Cable Equalization
• Analog/Digital Signal Detection
• JTAG Access Port for Testability
• Single +3.3V Supply, 650mW Typical
• Packages: 64-Pin 10mm and 14mm PQFP and 10mm TQFP

VSC7123 Connection Diagram

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