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XCR3384-12FTG256C, XCR3384-12FTG256I, XCR3384XL

Table of contents:
Info of XCR3384-12FTG256C
Info of XCR3384-12FTG256I
Info of XCR3384XL

XCR3384-12FTG256C, XCR3384-12FTG256I, XCR3384XL Selling Leads, Datasheet

MFG:XILINX Package Cooled:SOP D/C:03+

XCR3384-12FTG256C, XCR3384-12FTG256I, XCR3384XL Picture

XCR3384-12FTG256C, XCR3384-12FTG256I, XCR3384XL Datasheet download

Five Points

Part Number: XCR3384-12FTG256C

MFG: XILINX

Package Cooled: SOP

D/C: 03+

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XCR3384XL General Description

The XCR3384XL is a 3.3V, 384 macrocell CPLD targeted at power sensitive designs that require leading edge programmable logic solutions. A total of 24 function blocks provide 9,600 usable gates. Pin-to-pin propagation delays are 7.5 ns with a maximum system frequency of 127 MHz.

XCR3384XL Features

• Lowest power 384 macrocell CPLD
• 7.5 ns pin-to-pin logic delays
• System frequencies up to 127 MHz
• 384 macrocells with 9,600 usable gates
• Available in small footprint packages
- 144-pin TQFP (118 user I/O)
- 208-pin PQFP (172 user I/O)
- 256-ball FBGA (212 user I/O)
- 324-ball FBGA (220 user I/O)
• Optimized for 3.3V systems
- Ultra low power operation
- 5V tolerant I/O pins with 3.3V core supply
- Advanced 0.35 micron five layer metal EEPROM process
- FZP™ CMOS design technology
• Advanced system features
- In-system programming
- Input registers
- Predictable timing model
- Up to 23 clocks available per function block
- Excellent pin retention during design changes
- Full IEEE Standard 1149.1 boundary-scan (JTAG)- Four global clocks
- Eight product term control terms per function block
• Fast ISP programming times
• Port Enable pin for additional I/O
• 2.7V to 3.6V supply voltage at industrial grade voltage range
• Programmable slew rate control per output
• Security bit prevents unauthorized access
• Refer to XPLA3 family data sheet (DS012) for architecture description

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