YSS928F, YSS930-S, YSS932 Selling Leads, Datasheet
MFG:YAMAHA Package Cooled:QFP D/C:00+
YSS928F, YSS930-S, YSS932 Datasheet download

Part Number: YSS928F
MFG: YAMAHA
Package Cooled: QFP
D/C: 00+
MFG:YAMAHA Package Cooled:QFP D/C:00+
YSS928F, YSS930-S, YSS932 Datasheet download

MFG: YAMAHA
Package Cooled: QFP
D/C: 00+
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Datasheet: yss205
File Size: 920559 KB
Manufacturer:
Download : Click here to Download
PDF/DataSheet Download
Datasheet: yss205
File Size: 920559 KB
Manufacturer:
Download : Click here to Download
PDF/DataSheet Download
Datasheet: YSS932
File Size: 413606 KB
Manufacturer: YAMAHA [YAMAHA CORPORATION]
Download : Click here to Download
YSS932 consists of three blocks; the Main DSP block where AC-3 / Pro Logic II / DTS decoding is executed, the Sub DSP block where various sound field effects are added and the SPDIF receiver (DIR) block.
The Sub DSP is a 8 channel input / 8 channel output programmable DSP exclusively for sound field processing. It can apply such effects as simulation surround, output configuration and virtual surround. In addition, with SRAM or DRAM connected, it can produce reverberation up to 2.73 seconds delay at fs=48kHz. By using this function, it is possible to simulate various sound fields such as a hall or a church.
The SPDIF receiver (DIR) can handle the digital audio interface format input signals of the sampling frequency 32kHz through 96kHz.
If adopting some technology owned by another company is desired for use in Sub DSP block, note that a separate contract may be required between the owner of that technology and the user with respect to adoption of the technology.
| Parameter | Symbol | Condition | Min. | Typ. | Max. | Unit |
| Power Supply Voltage | VDD1 | except XI pin *1 XI pin |
Vss-0.5 | 4.6 | V | |
| AVDD | Vss-0.5 | 4.6 | V | |||
| VDD2 | Vss-0.5 | 3.6 | V | |||
| Input Voltage | VI | -0.5 | 5.75 | V | ||
| -0.5 | VDD1+0.5 | V | ||||
| Storage Temperature | Tstg | -50 | 125 | °C |

