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74LVC27DB-T, 74LVC27PW, 74LVC2952A

Table of contents:
Info of 74LVC27DB-T
Info of 74LVC27PW
Info of 74LVC2952A

74LVC27DB-T, 74LVC27PW, 74LVC2952A Selling Leads, Datasheet

MFG:NXP Package Cooled:TSSOP D/C:2004

74LVC27DB-T, 74LVC27PW, 74LVC2952A Picture

74LVC27DB-T, 74LVC27PW, 74LVC2952A Datasheet download

Five Points

Part Number: 74LVC27DB-T

MFG: NXP

Package Cooled: TSSOP

D/C: 2004

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74LVC2952A General Description

The 74LVC2952A is a low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74LVC2952A is an octal non-inverting registered transceiver. Two 8-bit back to back registers store data flowing in both directions between two bidirectional busses. Data applied to the inputs is entered and stored on the rising edge of the clock (CPnn) provided that the clock enable CE nn) is LOW. The data is then present at the 3-State output buffers, but is only accessible when the output enable input (OE nn) is LOW. Data flow from A inputs to B outputs is the same as for B inputs to A outputs. The 74LVC2952A is identical to the 74LVC2953A but has non-inverting outputs.

74LVC2952A Maximum Ratings

SYMBOL	PARAMETER	CONDITIONS	RATING	UNIT
V_CC	DC supply voltage		0.5 to +6.5	V
I_IK	DC input diode current	VI< 0	50	mA
V_I	DC input voltage	Note 2	0.5 to +6.5	V
I_OK	DC output diode current	VO >VCC or VO< 0	±50	mA
v_I/O	DC output voltage; output HIGH or LOW	Note 2	0.5 to V_CC +0.5	V
v_I/O	DC output voltage; output 3-State	Note 2	0.5 to 6.5	V
I_O	DC output source or sink current	V_O = 0 to V_CC	±50	mA
I_GND, I_CC	DC V_CC or GND current		±100	mA
T_stg	Storage temperature range		65 to +150	°C
P_TOT	Power dissipation per package plastic mini-pack (SO) plastic shrink mini-pack (SSOP and TSSOP)	above +70°C derate linearly with 8 mW/K above +60°C derate linearly with 5.5 mW/K	500 500	mW

74LVC2952A Features

• 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic
• Wide supply voltage range of 1.2 V to 3.6 V
• In accordance with the JEDEC standard no. 8-1 A
• Inputs accept voltages up to 5.5 V
• CMOS low power consumption
• Flow-through pin-out architecture
• 3-State outputs
• Direct interface with TTL levels
• Integrated 30 damping resistor

74LVC2952A Connection Diagram

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