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The AD9752 is a 12-bit resolution, wideband, second generation member of the TxDAC series of high performance, low power CMOS digital-to-analog-converters (DACs). The TxDAC family, which consists of pin compatible 8-, 10-, 12-, and 14-bit DACs, is specifically optimized for the transmit signal path of communication systems. All of the devices share the same interface options, small outline package and pinout, thus providing an upward or downward component selection path based on performance, resolution and cost.
The AD9752 offers exceptional ac and dc performance while supporting update rates up to 125 MSPS. The AD9752's flexible single-supply operating range of 4.5 V to 5.5 V and low power dissipation are well suited for portable and low power applications. Its power dissipation can be further reduced to a mere 65 mW, without a significant degradation in performance, by lowering the full-scale current output. Also, a power-down mode reduces the standby power dissipation to approximately 20 mW.
The AD9752 is manufactured on an advanced CMOS process. A segmented current source architecture is combined with a proprietary switching technique to reduce spurious components and enhance dynamic performance. Edge-triggered input latches and a 1.2 V temperature compensated bandgap reference have been integrated to provide a complete monolithic DAC solution.The digital inputs support +2.7 V to +5 V CMOS logic families.
AD9752ARU Maximum Ratings
ABSOLUTE MAXIMUMRATINGS*
Parameter
With Respect to
Min
Max
Units
AVDD
ACOM
0.3
+6.5
V
DVDD
DCOM
0.3
+6.5
V
ACOM
DCOM
0.3
+0.3
V
AVDD
DVDD
6.5
+6.5
V
CLOCK, SLEEP
DCOM
0.3
DVDD+0.3
V
Digital Inputs
DCOM
0.3
DVDD+0.3
V
IOUTA, IOUTB
ACOM
1.0
AVDD+0.3
V
ICOMP
ACOM
0.3
AVDD+0.3
V
REFIO, FSADJ
ACOM
0.3
AVDD+0.3
V
REFLO
ACOM
0.3
+0.3
V
Junction Temperature
+150
°C
Storage Temperature
65
+150
°C
Lead Temperature (10 sec)
+300
°C
AD9752ARU Features
High Performance Member of Pin-Compatible TxDAC Product Family 125 MSPS Update Rate 12-Bit Resolution Excellent Spurious Free Dynamic Range Performance SFDR to Nyquist @ 5 MHz Output: 79 dBc Differential Current Outputs: 2 mA to 20 mA Power Dissipation: 185 mW @ 5 V Power-Down Mode: 20 mW @ 5 V On-Chip 1.20 V Reference CMOS-Compatible +2.7 V to +5.5 V Digital Interface Package: 28-Lead SOIC and TSSOP Edge-Triggered Latches
AD9752ARU Typical Application
Wideband Communication Transmit Channel: Direct IF Basestations Wireless Local Loop Digital Radio Link Direct Digital Synthesis (DDS) Instrumentation