CD54AC02F3A, CD54AC02F3AQ, CD54AC04F Selling Leads, Datasheet
MFG:TI Package Cooled:CDIP14 D/C:00++
CD54AC02F3A, CD54AC02F3AQ, CD54AC04F Datasheet download
Part Number: CD54AC02F3A
MFG: TI
Package Cooled: CDIP14
D/C: 00++
CD54AC02F3A, CD54AC02F3AQ, CD54AC04F
- Table of contents:
Info of CD54AC02F3A
Info of CD54AC02F3AQ
Info of CD54AC04F
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About CD54AC02F3A
PDF/DataSheet Download
Datasheet: CD54AC02F3A
File Size: 26708 KB
Manufacturer: INTERSIL [Intersil Corporation]
Download : Click here to Download
About CD510825
PDF/DataSheet Download
Datasheet: CD510825
File Size: 79977 KB
Manufacturer: POWEREX [Powerex Power Semiconductors]
Download : Click here to Download
About CD510825
PDF/DataSheet Download
Datasheet: CD510825
File Size: 79977 KB
Manufacturer: POWEREX [Powerex Power Semiconductors]
Download : Click here to Download
CD54AC02F3A General Description
The CD54AC02F3A and CD54ACT02F3A are quad 2-input NOR gates that utilize the Harris Advanced CMOS Logic technology.
CD54AC02F3A Maximum Ratings
DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V
DC Input Diode Current, IIK
For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, IOK
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . .. .±50mA
DC Output Source or Sink Current per Output Pin, IO
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . .±50mA
DC VCC or Ground Current, ICC or IGND (Note 2) . . . . . . . .±100mA
DC Input Diode Current, IIK
For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, IOK
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . .. .±50mA
DC Output Source or Sink Current per Output Pin, IO
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . .±50mA
DC VCC or Ground Current, ICC or IGND (Note 2) . . . . . . . .±100mA
CD54AC02F3A Features
• This Circuit is Processed in Accordance to MIL-STD-883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1.
• Exceeds 2kV ESD Protection MIL-STD-883, Method 3015
• Meets JEDEC Standard No. 20
• SCR - Latch-Up-Resistant CMOS Process and Circuit Design
• Speed of Bipolar FAST/A/S with Significantly Reduced Power Consumption
• Functionally and Pin-Compatible with Industry 54 Bipolar Types in the FAST, AS and S Series
• Balanced Propagation Delays
• Military Operating Temperature Range
- Ceramic (CERDIP) 54 Series: . . . . . . . . -55 to 125
• ±24mA Output Drive Current, Drives 75W Lines without Need for Terminations
• Fan Out (Over Temperature)
- ACL Loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2400
- FAST Loads. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
- AS Loads. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
• Balanced Noise Immunity at 30% of Supply for AC Type
• Supply Voltage Range
- AC Types . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5V to 5.5V
- ACT Types. . . . . . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
• Exceeds 2kV ESD Protection MIL-STD-883, Method 3015
• Meets JEDEC Standard No. 20
• SCR - Latch-Up-Resistant CMOS Process and Circuit Design
• Speed of Bipolar FAST/A/S with Significantly Reduced Power Consumption
• Functionally and Pin-Compatible with Industry 54 Bipolar Types in the FAST, AS and S Series
• Balanced Propagation Delays
• Military Operating Temperature Range
- Ceramic (CERDIP) 54 Series: . . . . . . . . -55 to 125
• ±24mA Output Drive Current, Drives 75W Lines without Need for Terminations
• Fan Out (Over Temperature)
- ACL Loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2400
- FAST Loads. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
- AS Loads. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
• Balanced Noise Immunity at 30% of Supply for AC Type
• Supply Voltage Range
- AC Types . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5V to 5.5V
- ACT Types. . . . . . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
CD54AC02F3A Connection Diagram
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