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DP83936AVUL20, DP83936AVUL-20, DP83936AVUL25

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MFG:National Semiconductor  Category:Integrated Circuits (ICs)  Package Cooled:nsc  D/C:dc02

DP83936AVUL-20 Picture

DP83936AVUL20, DP83936AVUL-20, DP83936AVUL25 Datasheet download

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Part Number: DP83936AVUL-20

Category: Integrated Circuits (ICs)

MFG: National Semiconductor

Package Cooled: nsc

D/C: dc02

Description: IC CTRLR ORIENT NETWORK 160PQFP

 

 
 
 
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  • DP802511V

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About DP802518

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Datasheet: DP802518

File Size: 167262 KB

Manufacturer: National Semiconductor

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About DP83936AVUL-20

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Datasheet: DP83936AVUL-20

File Size: 1142633 KB

Manufacturer: NSC [National Semiconductor]

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    Contact: Ms.qianwong   MSN:sophie@csq013.com
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    Fax: 86-755-83514452
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  • DP802512V

  • Pack: PLCC D/C: 02+& Qty: 0 Note: -  Adddate: 2026-08-23
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  • CSQ international ltd   China
    Contact: Ms.qianwong   MSN:sophie@csq013.com
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    Fax: 86-755-83514452
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  • DP802513V

  • Pack: PLCC D/C: 02+& Qty: 0 Note: -  Adddate: 2026-08-23
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  • CSQ international ltd   China
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About DP802518

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Datasheet: DP802518

File Size: 167262 KB

Manufacturer: National Semiconductor

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DP83936AVUL-20 Parameters

Technical/Catalog InformationDP83936AVUL-20
VendorNational Semiconductor
CategoryIntegrated Circuits (ICs)
Controller TypeNetwork Interface Controller
InterfaceTwisted Pair
Voltage - Supply4.75 V ~ 5.25 V
Current - Supply140mA
Package / Case160-PQFP
PackagingTube
Operating Temperature0°C ~ 70°C
Lead Free StatusContains Lead
RoHS StatusRoHS Non-Compliant
Other Names DP83936AVUL 20
DP83936AVUL20

DP83936AVUL-20 General Description

The SONIC-T (Systems-Oriented Network Interface Controller with Twisted Pair) is a second-generation Ethernet Controller designed to meet the demands of today's high-speed 32- and 16-bit systems. Its system interface operates with a high speed DMA that typically consumes less than 5% of the bus bandwidth. Selectable bus modes provide both big and little endian byte ordering and a clean interface to standard microprocessors. The linked-list buffer management system of SONIC-T offers maximum flexibility in a variety of environments from PC-oriented adapters to high-speed motherboard designs. The SONIC-T can be configured for full duplex operation. Furthermore, the SONIC-T integrates a fully-compatible IEEE 802.3 Encoder/Decoder (ENDEC) and a Twisted Pair Interface which provide a one-chip solution for Ethernet when using 10BASE-T. When using 10BASE2 or 10BASE5, the SONIC-T may be paired with the DP8392 Coaxial Transceiver Interface to achieve a simple 2-chip solution.

For increased performance, the SONIC-T implements a unique buffer management scheme to efficiently process receive and transmit packets in system memory. No intermediate packet copy is necessary. The receive buffer management uses three areas in memory for (1) allocating additional resources, (2) indicating status information, and (3) buffering packet data. During reception, the SONIC-T stores packets in the buffer area, then indicates receive status and control information in the descriptor area. The system allocates more memory resources to the SONIC-T by adding descriptors to the memory resource area. The transmit buffer management uses two areas in memory:
1. indicating status and control information;
2. fetching packet data.
The system can create a transmit queue allowing multiple packets to be transmitted from a single transmit command. The packet data can reside on any arbitrary byte boundary and can exist in several non-contiguous locations.

DP83936AVUL-20 Maximum Ratings

Supply Voltage (VCC) b.......................................0.5V to 7.0V
DC Input Voltage (VIN) b..........................0.5V to VCC a 0.5V
DC Output Voltage (VOUT) b....................0.5V to VCC a 0.5V
Storage Temperature Range (TSTG) b65°C to ...........150°C
Power Dissipation (PD) ............................................500 mW
Lead Temp. (TL) (Soldering, 10 sec.) .........................260°C
ESD Rating
(RZAP e 1.5k, CZAP e 120 pF).................................... 1.5 kV

DP83936AVUL-20 Features

·  32-bit non-multiplexed address and data bus
·  Configurable for Full Duplex operation
·  Auto AUI/TPI selection
·  High-speed interruptible DMA
·  Linked-list buffer management maximizes flexibility
·  Two independent 32-byte transmit and receive FIFOs
·  Bus compatibility for all standard microprocessors
·  Integrated IEEE 802.3 ENDEC
·  Integrated Twisted Pair Interface
·  Complete address filtering for up to 16 physical and/or
  multicast addresses
·  32-bit general-purpose timer
·  Loopback diagnostics
·  Fabricated in low-power CMOS
·  160 PQFP package
·  Full network management facilities support the 802.3
   layer management standard
·  Integrated support for bridge and repeater applications

DP83936AVUL-20 Connection Diagram

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