MFG:Intersil Category:ICs, Integrated Circuits, Semiconductors Package Cooled:SMD28 D/C:01+
HSP43124SC-45, HSP43124SI, HSP43124SI40 Datasheet download
Category: ICs, Integrated Circuits, Semiconductors
MFG: Intersil
Package Cooled: SMD28
D/C: 01+
Description: IC I/O FILTER SER 24BIT 28-SOIC
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PDF/DataSheet Download
Datasheet: HSP43124SC-45
File Size: 147641 KB
Manufacturer: INTERSIL [Intersil Corporation]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: HSP43124SI-40
File Size: 147641 KB
Manufacturer: INTERSIL [Intersil Corporation]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: HSP3824
File Size: 283233 KB
Manufacturer: HARRIS [Harris Corporation]
Download : Click here to Download
| Technical/Catalog Information | HSP43124SC-45 |
| Vendor | Intersil |
| Category | ICs, Integrated Circuits, Semiconductors |
| Type | Digital Filter |
| Mounting Type | Surface (SMD, SMT) |
| Package Name | 28-SOIC |
| Supply Voltage | 5.00 V [Typ] |
| Operating Temperature | 0 °C [Min] |
| Operating Temperature | 70 °C [Max] |
| Temperature Grade | Commercial |
| Packaging | Bulk |
| Lead Free Status | Contains Lead |
| RoHS Status | RoHS Non-Compliant |
| Other Names | HSP43124SC 45 HSP43124SC45 |
The Serial I/O Filter is a high performance filter engine that is ideal for off loading the burden of filter processing from a DSP microprocessor. It supports a variety of multistage filter configurations based on a user programmable filter and fixed coefficient halfband filters. These configurations include a programmable FIR filter of up to 256 taps, a cascade of from one to five halfband filters, or a cascade of halfband filters followed by a programmable FIR. The half band filters each decimate by a factor of two, and the FIR filter decimates from one to eight. When all six filters are selected, a maximum decimation of 256 is provided.
For digital tuning applications, a separate multiplier is provided which allows the incoming data stream to be multiplied, or mixed, by a user supplied mix factor. A two pin interface is provided for serially loading the mix factor from an external source or selecting the mix factor from an on-board ROM. The on-board ROM contains samples of a sinusoid capable of spectrally shifting the input data by one quarter of the sample rate, FS/4. This allows the chip to function as a digital down converter when the filter stages are configured as a low-pass filter.
The serial interface for 3- input and output data is compatible with the serial ports of common DSP microprocessors.
Coefficients and configuration data are loaded over a bidirectional eight bit interface.
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