Position: Home > DataSheet > Index I > IDT Series > IDT23S08E, IDT23S08T, IDT23S09

Low Cost Custom Prototype PCB Manufacturer

IDT23S08E, IDT23S08T, IDT23S09

Table of contents:
Info of IDT23S08E
Info of IDT23S08T
Info of IDT23S09

IDT23S08E, IDT23S08T, IDT23S09 Selling Leads, Datasheet

MFG:N/A Package Cooled:N/A D/C:09+

IDT23S08E, IDT23S08T, IDT23S09 Datasheet download

Five Points

Part Number: IDT23S08E

MFG: N/A

Package Cooled: N/A

D/C: 09+

Attentive hint

Want to post a buying lead? If you are not a member yet, please select the specific/related part number first and then fill the quantity and your contact details in the "Request for Quotation Form" on the left, and then click "Send RFQ".Your buying lead can then be posted, and the reliable suppliers will quote via our online message system or other channels soon.

How to buy ?

How long will receive a response.

Top Sellers:

TOP

IDT23S08E General Description

The IDT23S08E is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 200MHz.

The IDT23S08E has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the input clock directly drives the outputs for system testing purposes. In the absence of an input clock, the IDT23S08E enters power down. In this mode, the device will draw less than 12A for Commercial Temperature range and less than 25A for Industrial temperature range, and the outputs are tri-stated.

The IDT23S08E is available in six unique configurations for both prescaling and multiplication of the Input REF Clock. (See available options table.)

The PLL is closed externally to provide more flexibility by allowing the user to control the delay between the input clock and the outputs.

The IDT23S08E is characterized for both Industrial and Commercial operation.

IDT23S08E Maximum Ratings

Symbol	Rating	Max.	Unit
V_DD	Supply Voltage Range	0.5 to +4.6	V
VI ⁽²⁾	Input Voltage Range (REF)	0.5 to +5.5	V
VI	Input Voltage Range (except REF)	0.5 toV_DD+0.5	V
IIK (VI < 0)	Input Clamp Current	50	mA
IO (VO = 0 to VDD)	Continuous Output Current	±50	mA
V_DDor G_ND	Continuous Current	±100	mA
T_A = 55°C (in still air)(3)	Maximum Power Dissipation	0.7	W
TS_TG	Storage Temperature Range	65 to +150	°C
Operating Temperature	Commercial Temperature Range	0 to +70	°C
Operating Temperature	Industrial Temperature Range	-40 to +85	°C

NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. The input and output negative-voltage ratings may be exceeded if the input and output
clamp-current ratings are observed.
3. The maximum package power dissipation is calculated using a junction temperature
of 150°C and a board trace length of 750 mils.

IDT23S08E Features

• Phase-Lock Loop Clock Distribution for Applications ranging
from 10MHz to 200MHz operating frequency
• Distributes one clock input to two banks of four outputs
• Separate output enable for each output bank
• External feedback (FBK) pin is used to synchronize the outputs
to the clock input
• Output Skew <200 ps
• Low jitter <200 ps cycle-to-cycle
• 1x, 2x, 4x output options (see table):
IDT23S08E-1 1x
IDT23S08E-2 1x, 2x
IDT23S08E-3 2x, 4x
IDT23S08E-4 2x
IDT23S08E-1H, -2H, and -5H for High Drive
• No external RC network required
• Operates at 3.3V VDD
• Spread spectrum compatible
• Available in SOIC and TSSOP packages

IDT23S08E Connection Diagram

IDT23S08T General Description

The IDT23S08T is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz.

The IDT23S08T has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the input clock directly drives the outputs for system testing purposes. In the absence of an input clock, the IDT23S08T enters power down. In this mode, the device will draw less than 12A, and the outputs are tri-stated.

The IDT23S08T is available in six unique configurations for both prescaling and multiplication of the Input REF Clock. (See available options table.)

The PLL is closed externally to provide more flexibility by allowing the user to control the delay between the input clock and the outputs. The IDT23S08T is characterized for Commercial operation

IDT23S08T Maximum Ratings

Parameter	Conditions/Description	Min.	Max.	Units
Ambient Temperature Range		-40	85	°C
Storage Temperature (Ts)		-55	150	°C
Junction Temperature (TJ)			125	°C
Input Voltage	VDD pin	-0.3	3.6	VDC
Input Voltage	Any pin other than VDD	-0.5	VDD+0.5	VDC
Pin Current	DC		40	mA

Symbol	Rating	Max.	Unit
VDD	Supply Voltage Range	0.5 to +4.6	v
VI (2)	Input Voltage Range (REF)	0.5 to +5.5	v
VI	Input Voltage Range (except REF)	0.5 to VDD+0.5	v
IIK (VI < 0)	Input Clamp Current	50	mA
IO (VO = 0 to VDD)	Continuous Output Curre	±50	mA
VDD or GND	Continuous Current	±100	mA
TA = 55°C (in still air)(3)	Maximum Power Dissipation	0.7	w
TSTG	Storage Temperature Ran	65 to +15	°C
Operating Temperature	Commercial Tempera Range	0 to +70	°C

IDT23S08T Features

• Phase-Lock Loop Clock Distribution for Applications ranging
from 10MHz to 133MHz operating frequency
• Distributes one clock input to two banks of four outputs
• Separate output enable for each output bank
• External feedback (FBK) pin is used to synchronize the outputs
to the clock input
• Output Skew <200 ps
• Low jitter <200 ps cycle-to-cycle
• 1/2x, 1x, 2x, 4x output options (see table):
IDT23S08T-1 1x
IDT23S08T-2 1x, 2x
IDT23S08T-3 2x, 4x
IDT23S08T-4 2x
IDT23S08T-5 1/2x
• No external RC network required
• Operates at 2.5V VDD
• Spread spectrum compatible
• Available in SOIC package

IDT23S08T Connection Diagram

IDT23S09 General Description

    The IDT23S09 is a high-speed phase-lock loop (PLL) clock buffer,designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz.

    The IDT23S09 is a 16-pin version of the IDT23S05. The IDT23S09 accepts one reference input, and drives two banks of four low skew clocks. The -1H version of this device operates up to 133MHz frequency and has higher drive than the -1 device. All parts have on-chip PLLs which lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. In the absence of an input clock, the IDT23S09 enters power down. In this mode, the device will draw less than 12µA for Commercial Temperature range and less than 25µA for Industrial temperature range, and the outputs are tri-stated.

     The IDT23S09 is characterized for both Industrial and Commercial operation.

IDT23S09 Maximum Ratings

Symbol	Rating	Max.	Unit
V_DD	Supply Voltage Range	0.5 to +4.6	V
V_I⁽²⁾	Input Voltage Range (REF)	0.5 to +5.5	V
V_I	Input Voltage Range (except REF)	0.5 to V_DD+0.5	V
I_IK (V_I< 0)	Input Clamp Current	50	mA
I_O (V_O = 0 to V_DD)	Continuous Output Current	±50	mA
V_DD or GND	Continuous Current	±100	mA
T_A = 55 (in still air)⁽³⁾	Maximum Power Dissipation	0.7	W
T_STG	Storage Temperature Range	65 to +150
Operating Temperature	Commercial Temperature Range	0 to +70
Operating Temperature	Industrial Temperature Range	-40 to +85

IDT23S09 Features

• Phase-Lock Loop Clock Distribution
• 10MHz to 133MHz operating frequency
• Distributes one clock input to one bank of five and one bank of
four outputs
• Separate output enable for each output bank
• Output Skew < 250ps
• Low jitter <200 ps cycle-to-cycle
• IDT23S09-1 for Standard Drive
• IDT23S09-1H for High Drive
• No external RC network required
• Operates at 3.3V VDD
• Spread spectrum compatible
• Available in SOIC and TSSOP packages

IDT23S09 Typical Application

• SDRAM
• Telecom
• Datacom
• PC Motherboards/Workstations
• Critical Path Delay Designs

IDT23S09 Connection Diagram

Hotspot Suppliers Product

Product List A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 0 1 2 3 4 5 6 7 8 9

MT58L64L18CT-10

Price: 4-6 USD

MT58L64L18CT-10 TQFP100
DL-7140-211M

Price: 5-6.5 USD

DL-7140-211M laser tube
74LVC74APG

Price: 4-5 USD

74LVC74APG - IC FLIP FLOP D-Type POS-EDG DUAL 14TSSOP
CY28346ZI-2

Price: 6.5-8 USD

CYPRESS - Clock Synthesizer with Differential CPU Outputs
PI5V330QEX

Price: 0.284-0.286 USD

PI5V330QEX Pericom Multiplexer Switch ICs
BSM300GA120DN2

Price: 1-2 USD

IGBT power module, Single switch, 1200 V, Collector-emitter voltage, 430A
SVA150XG04TB

Price: 1-2 USD

a-Si TFT-LCD, NEC, 228.096Hmm, 560V
PC354N1

Price: 0.124-0.2 USD

PC354N1T - Mini-flat Package, AC Input Type Photocoupler - Sharp Electrionic Components
RL1210JR-070R22L

Price: 0.177-0.178 USD

RL1210JR51-XX-BL - Thick Film Chip Resistor Low Ohmic - TAITRON Components Incorporated
STPS140A

Price: 0.053-0.055 USD

STPS140A - POWER SCHOTTKY RECTIFIER - STMicroelectronics
STA013

Price: 1.45-1.5 USD

STA013 - MPEG 2.5 LAYER III AUDIO DECODER - STMicroelectronics
SMBJ5347B

Price: 0.073-0.075 USD

SMBJ5347B - 5 Watt Surface Mount Silicon Zener Diodes - Micro Commercial Components