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MCM69C233, MCM69C33TQ15, MCM69D536

Table of contents:
Info of MCM69C233
Info of MCM69C33TQ15
Info of MCM69D536

MCM69C233, MCM69C33TQ15, MCM69D536 Selling Leads, Datasheet

MFG:MOTOROLA Package Cooled:QFP D/C:09+

MCM69C233, MCM69C33TQ15, MCM69D536 Picture

MCM69C233, MCM69C33TQ15, MCM69D536 Datasheet download

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Part Number: MCM69C233

MFG: MOTOROLA

Package Cooled: QFP

D/C: 09+

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MCM69C233 General Description

The MCM69C233 is a flexible contentaddressable memory (CAM) that can contain 4096 entries of 64 bits each. The widths of the match field and the output field are programmable, and the match time is designed to be 210 ns. As a result, the MCM69C233 is well suited for datacom applications such as Virtual Path Identifier/Virtual Circuit Identifier (VPI/VCI) translation in ATM switches up to OC12 (622 Mbps) data rates and Media Access Control (MAC) address lookup in Ethernet/Fast Ethernet bridges. The match duty cycle of the MCM69C233 is user defined, with a tradeoff between the time between the match request rate and the rate of new entries added to the CAM.
• 4096 Entries
• 210 ns Match Time
• Mask Register to "Don't Care" Selected Bits
• Depth Expansion by Cascading Multiple Devices
• 66 MHz Maximum Clock Rate
• Programmable Match and Output Field Widths
• Concurrent Matching of Virtual Path Circuits and Virtual Connection Circuits in ATM Mode
• Separate Ports for Control and Match Operations
• 300 ns Insertion Time if 1 of 12 Entry Queue Locations is Empty
• 18 ms Initialization Time After Fast Insertion (at PowerUp Only)
• Single 3.3 V ±5% Supply
• IEEE Standard 1149.1 Test Port (JTAG)
• 100Pin TQFP Package

MCM69C233 Maximum Ratings

Rating	Symbol	Value	Unit
Supply Voltage (see Note 2)	V_DD	4.6	V
Voltage Relative to VSS (see Note 2)	V_in	0.5 to V_DD + 3 V	V
Output Current per Pin	I_out	±20	mA
Package Power Dissipation (see Note 3)	P_D	-	W
Temperature Under Bias (see Note 3) Commercial Industrial	T_bias	10 to 85 40 to 85
Operating Temperature (see Note 4) Commercial Industrial	T_A	0 to 70 40 to 85
Storage Temperature	T_stg	55 to 125

NOTES:
1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to RECOMMENDED OPERATING CONDITIONS. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
2. All voltages are referenced to VSS.
3. Power dissipation capability will be dependent upon package characteristics and use environment. See Package Thermal Characteristics.
4. Consult Junction to Ambient Thermal Characteristics table for details and conditions.

MCM69C233 Connection Diagram

MCM69D536 General Description

The MCM69D536 is a 1Mbit static random access memory, organized as 32K words of 36 bits. It features common data input and data output buffers and incorporates input and output registers onboard with high speed SRAM. The MCM69D536 allows the user to concurrently perform reads, writes, or passthrough cycles in combination on the two data ports. The two address ports (AX, AY) determine the read or write locations for their respective data ports (DQX, DQY).

The synchronous design allows for precise cycle control with the use of an external single clock (K). All signal pins except output enables (GX, GY) are registered on the rising edge of clock (K).

The passthrough feature allows data to be passed from one port to the other, in either direction. The PTX input must be asserted to pass data from port X to port Y. The PTY will likewise pass data from port Y to port X. A passthrough operation takes precedence over a read operation.

For the case when AX and AY are the same, certain protocols are followed. If both ports are read, the reads occur normally. If one port is written and the other is read, the read from the array will occur before the data is written. If both ports are written, only the data on DQY will be written to the array.

MCM69D536 Maximum Ratings

Rating	Symbol	Value	Unit
Power Supply Voltage	V_DD	0.5 to + 4.6	V
Voltage Relative to VSS for Any Pin Except VDD	V_in, V_out	0.5 to V_DD + 0.5	V
Output Current	I_out	± 20	mA
Power Dissipation	P_D	TBD	W
Temperature Under Bias	T_bias	10 to + 85	°C
Operating Temperature	T_A	0 to + 70	°C
Storage Temperature - Plastic	T_stg	55 to + 125	°C

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to RECOMMENDED OPERATING CONDITIONS. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.

MCM69D536 Features

• Single 3.3 V ± 5% Power Supply
• Fast Access Times: 6/8 ns Max
• Throughput of 2.98 Gigabits/Second
• Single Clock Operation
• Address, Data Input, E1, E2, PTX, PTY, WX, WY, and Data Output Registers OnChip
• 83 MHz Maximum Clock Frequency
• SelfTimed Write
• Two BiDirectional Data Buses
• Can be Configured as Separate I/O
• PassThrough Feature
• Asynchronous Output Enables (GX, GY)
• LVTTL Compatible I/O
• Concurrent Reads and Writes
• 176Pin TQFP Package

MCM69D536 Typical Application

· ATM
· Ethernet Switches
· Routers
· Cell/Frame Buffers
· SNA Switches
· Shared Memory

MCM69D536 Connection Diagram

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