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The MM74HC175 high speed D-type flip-flop with complementary outputs utilizes advanced silicon-gate CMOS technology to achieve the high noise immunity and low power consumption of standard CMOS integrated circuits, along with the ability to drive 10 LS-TTL loads.
Information at the D inputs of the MM74HC175 is transferred to the Q and Q outputs on the positive going edge of the clock pulse. Both true and complement outputs from each flip flop are externally available. All four flip-flops are controlled by a common clock and a common CLEAR. Clearing is accomplished by a negative pulse at the CLEAR input. All four Q outputs are cleared to a logical "0" and all four Q outputs to a logical "1."
The 74HC logic family is functionally as well as pin-out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.
MM74HC175 Maximum Ratings
Supply Voltage (VCC) ............-0.5 to +7.0V DC Input Voltage (VIN) .........-1.5 to VCC +1.5V DC Output Voltage (VOUT) .......-0.5 to VCC +0.5V Clamp Diode Current (IIK, IOK) ..........±20 mA DC Output Current, per pin (IOUT) ........±35 mA DC VCC or GND Current, per pin (ICC) .......±70 mA Storage Temperature Range (TSTG) ..-65°C to +150° C Power Dissipation (PD) (Note 3)..................... 600 mW S.O. Package only................ 500 mW Lead Temperature (TL) (Soldering 10 seconds).............. 260°C Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Note 2: Unless otherwise specified all voltages are referenced to ground.
MM74HC175 Features
`Typical propagation delay: 15 ns `Wide operating supply voltage range: 26V `Low input current: 1 A maximum `Low quiescent supply current: 80 A maximum (74HC) `High output drive current: 4 mA minimum (74HC)